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drm/amd/display: Fix dml2 assigned pipe search

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[Why & How]
DML2 currently finds assigned pipes in array order rather than the
existing linked list order. This results in rearranging pipe order
on flip and more importantly otg inst and pipe idx mismatch.

This change preserves the order of existing pipes and guarantees
the head pipe will have matching otg inst and pipe idx.

Reviewed-by: Gabe Teeger <gabe.teeger@amd.com>
Acked-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Dmytro Laktyushkin <dmytro.laktyushkin@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Dmytro Laktyushkin 2024-01-04 09:14:18 -05:00 • committed by Alex Deucher
parent f0ec30549a
commit d451b534e0
1 changed files with 28 additions and 8 deletions
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36
drivers/gpu/drm/amd/display/dc/dml2/dml2_dc_resource_mgmt.c
View file

@ -141,14 +141,28 @@ static unsigned int find_pipes_assigned_to_plane(struct dml2_context *ctx,
{ {
int i; int i;
unsigned int num_found = 0; unsigned int num_found = 0;
unsigned int plane_id_assigned_to_pipe; unsigned int plane_id_assigned_to_pipe = -1;
for (i = 0; i < ctx->config.dcn_pipe_count; i++) { for (i = 0; i < ctx->config.dcn_pipe_count; i++) {
if (state->res_ctx.pipe_ctx[i].plane_state && get_plane_id(ctx, state, state->res_ctx.pipe_ctx[i].plane_state, struct pipe_ctx *pipe = &state->res_ctx.pipe_ctx[i];
state->res_ctx.pipe_ctx[i].stream->stream_id,
ctx->v20.scratch.dml_to_dc_pipe_mapping.dml_pipe_idx_to_plane_index[state->res_ctx.pipe_ctx[i].pipe_idx], &plane_id_assigned_to_pipe)) { if (!pipe->stream)
if (plane_id_assigned_to_pipe == plane_id) continue;
pipes[num_found++] = i;
get_plane_id(ctx, state, pipe->plane_state, pipe->stream->stream_id,
ctx->v20.scratch.dml_to_dc_pipe_mapping.dml_pipe_idx_to_plane_index[pipe->pipe_idx],
&plane_id_assigned_to_pipe);
if (pipe->plane_state && plane_id_assigned_to_pipe == plane_id && !pipe->top_pipe && !pipe->prev_odm_pipe) {
while (pipe) {
struct pipe_ctx *mpo_pipe = pipe;
while (mpo_pipe) {
pipes[num_found++] = mpo_pipe->pipe_idx;
mpo_pipe = mpo_pipe->bottom_pipe;
}
pipe = pipe->next_odm_pipe;
}
break;
} }
} }
@ -566,8 +580,14 @@ static unsigned int find_pipes_assigned_to_stream(struct dml2_context *ctx, stru
unsigned int num_found = 0; unsigned int num_found = 0;
for (i = 0; i < ctx->config.dcn_pipe_count; i++) { for (i = 0; i < ctx->config.dcn_pipe_count; i++) {
if (state->res_ctx.pipe_ctx[i].stream && state->res_ctx.pipe_ctx[i].stream->stream_id == stream_id) { struct pipe_ctx *pipe = &state->res_ctx.pipe_ctx[i];
pipes[num_found++] = i;
if (pipe->stream && pipe->stream->stream_id == stream_id && !pipe->top_pipe && !pipe->prev_odm_pipe) {
while (pipe) {
pipes[num_found++] = pipe->pipe_idx;
pipe = pipe->next_odm_pipe;
}
break;
} }
} }