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drm/sun4i: de2: csc_mode in de2 format struct is mostly redundant

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For RGB formats CSC mode is always set to none and for YUV formats
almost always set to YUV to RGB.

Add a helper function to deduce CSC mode from format.

Acked-by: Maxime Ripard <mripard@kernel.org>
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Link: https://patchwork.freedesktop.org/patch/msgid/20200224173901.174016-6-jernej.skrabec@siol.net
This commit is contained in:
Jernej Skrabec 2020-02-24 18:38:59 +01:00
parent a9a753594a
commit daab3d0e8e
3 changed files with 23 additions and 55 deletions
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48
drivers/gpu/drm/sun4i/sun8i_mixer.c
View file

@ -31,250 +31,202 @@ static const struct de2_fmt_info de2_formats[] = {
{ {
.drm_fmt = DRM_FORMAT_ARGB8888, .drm_fmt = DRM_FORMAT_ARGB8888,
.de2_fmt = SUN8I_MIXER_FBFMT_ARGB8888, .de2_fmt = SUN8I_MIXER_FBFMT_ARGB8888,
.csc = SUN8I_CSC_MODE_OFF,
}, },
{ {
.drm_fmt = DRM_FORMAT_ABGR8888, .drm_fmt = DRM_FORMAT_ABGR8888,
.de2_fmt = SUN8I_MIXER_FBFMT_ABGR8888, .de2_fmt = SUN8I_MIXER_FBFMT_ABGR8888,
.csc = SUN8I_CSC_MODE_OFF,
}, },
{ {
.drm_fmt = DRM_FORMAT_RGBA8888, .drm_fmt = DRM_FORMAT_RGBA8888,
.de2_fmt = SUN8I_MIXER_FBFMT_RGBA8888, .de2_fmt = SUN8I_MIXER_FBFMT_RGBA8888,
.csc = SUN8I_CSC_MODE_OFF,
}, },
{ {
.drm_fmt = DRM_FORMAT_BGRA8888, .drm_fmt = DRM_FORMAT_BGRA8888,
.de2_fmt = SUN8I_MIXER_FBFMT_BGRA8888, .de2_fmt = SUN8I_MIXER_FBFMT_BGRA8888,
.csc = SUN8I_CSC_MODE_OFF,
}, },
{ {
.drm_fmt = DRM_FORMAT_XRGB8888, .drm_fmt = DRM_FORMAT_XRGB8888,
.de2_fmt = SUN8I_MIXER_FBFMT_XRGB8888, .de2_fmt = SUN8I_MIXER_FBFMT_XRGB8888,
.csc = SUN8I_CSC_MODE_OFF,
}, },
{ {
.drm_fmt = DRM_FORMAT_XBGR8888, .drm_fmt = DRM_FORMAT_XBGR8888,
.de2_fmt = SUN8I_MIXER_FBFMT_XBGR8888, .de2_fmt = SUN8I_MIXER_FBFMT_XBGR8888,
.csc = SUN8I_CSC_MODE_OFF,
}, },
{ {
.drm_fmt = DRM_FORMAT_RGBX8888, .drm_fmt = DRM_FORMAT_RGBX8888,
.de2_fmt = SUN8I_MIXER_FBFMT_RGBX8888, .de2_fmt = SUN8I_MIXER_FBFMT_RGBX8888,
.csc = SUN8I_CSC_MODE_OFF,
}, },
{ {
.drm_fmt = DRM_FORMAT_BGRX8888, .drm_fmt = DRM_FORMAT_BGRX8888,
.de2_fmt = SUN8I_MIXER_FBFMT_BGRX8888, .de2_fmt = SUN8I_MIXER_FBFMT_BGRX8888,
.csc = SUN8I_CSC_MODE_OFF,
}, },
{ {
.drm_fmt = DRM_FORMAT_RGB888, .drm_fmt = DRM_FORMAT_RGB888,
.de2_fmt = SUN8I_MIXER_FBFMT_RGB888, .de2_fmt = SUN8I_MIXER_FBFMT_RGB888,
.csc = SUN8I_CSC_MODE_OFF,
}, },
{ {
.drm_fmt = DRM_FORMAT_BGR888, .drm_fmt = DRM_FORMAT_BGR888,
.de2_fmt = SUN8I_MIXER_FBFMT_BGR888, .de2_fmt = SUN8I_MIXER_FBFMT_BGR888,
.csc = SUN8I_CSC_MODE_OFF,
}, },
{ {
.drm_fmt = DRM_FORMAT_RGB565, .drm_fmt = DRM_FORMAT_RGB565,
.de2_fmt = SUN8I_MIXER_FBFMT_RGB565, .de2_fmt = SUN8I_MIXER_FBFMT_RGB565,
.csc = SUN8I_CSC_MODE_OFF,
}, },
{ {
.drm_fmt = DRM_FORMAT_BGR565, .drm_fmt = DRM_FORMAT_BGR565,
.de2_fmt = SUN8I_MIXER_FBFMT_BGR565, .de2_fmt = SUN8I_MIXER_FBFMT_BGR565,
.csc = SUN8I_CSC_MODE_OFF,
}, },
{ {
.drm_fmt = DRM_FORMAT_ARGB4444, .drm_fmt = DRM_FORMAT_ARGB4444,
.de2_fmt = SUN8I_MIXER_FBFMT_ARGB4444, .de2_fmt = SUN8I_MIXER_FBFMT_ARGB4444,
.csc = SUN8I_CSC_MODE_OFF,
}, },
{ {
/* for DE2 VI layer which ignores alpha */ /* for DE2 VI layer which ignores alpha */
.drm_fmt = DRM_FORMAT_XRGB4444, .drm_fmt = DRM_FORMAT_XRGB4444,
.de2_fmt = SUN8I_MIXER_FBFMT_ARGB4444, .de2_fmt = SUN8I_MIXER_FBFMT_ARGB4444,
.csc = SUN8I_CSC_MODE_OFF,
}, },
{ {
.drm_fmt = DRM_FORMAT_ABGR4444, .drm_fmt = DRM_FORMAT_ABGR4444,
.de2_fmt = SUN8I_MIXER_FBFMT_ABGR4444, .de2_fmt = SUN8I_MIXER_FBFMT_ABGR4444,
.csc = SUN8I_CSC_MODE_OFF,
}, },
{ {
/* for DE2 VI layer which ignores alpha */ /* for DE2 VI layer which ignores alpha */
.drm_fmt = DRM_FORMAT_XBGR4444, .drm_fmt = DRM_FORMAT_XBGR4444,
.de2_fmt = SUN8I_MIXER_FBFMT_ABGR4444, .de2_fmt = SUN8I_MIXER_FBFMT_ABGR4444,
.csc = SUN8I_CSC_MODE_OFF,
}, },
{ {
.drm_fmt = DRM_FORMAT_RGBA4444, .drm_fmt = DRM_FORMAT_RGBA4444,
.de2_fmt = SUN8I_MIXER_FBFMT_RGBA4444, .de2_fmt = SUN8I_MIXER_FBFMT_RGBA4444,
.csc = SUN8I_CSC_MODE_OFF,
}, },
{ {
/* for DE2 VI layer which ignores alpha */ /* for DE2 VI layer which ignores alpha */
.drm_fmt = DRM_FORMAT_RGBX4444, .drm_fmt = DRM_FORMAT_RGBX4444,
.de2_fmt = SUN8I_MIXER_FBFMT_RGBA4444, .de2_fmt = SUN8I_MIXER_FBFMT_RGBA4444,
.csc = SUN8I_CSC_MODE_OFF,
}, },
{ {
.drm_fmt = DRM_FORMAT_BGRA4444, .drm_fmt = DRM_FORMAT_BGRA4444,
.de2_fmt = SUN8I_MIXER_FBFMT_BGRA4444, .de2_fmt = SUN8I_MIXER_FBFMT_BGRA4444,
.csc = SUN8I_CSC_MODE_OFF,
}, },
{ {
/* for DE2 VI layer which ignores alpha */ /* for DE2 VI layer which ignores alpha */
.drm_fmt = DRM_FORMAT_BGRX4444, .drm_fmt = DRM_FORMAT_BGRX4444,
.de2_fmt = SUN8I_MIXER_FBFMT_BGRA4444, .de2_fmt = SUN8I_MIXER_FBFMT_BGRA4444,
.csc = SUN8I_CSC_MODE_OFF,
}, },
{ {
.drm_fmt = DRM_FORMAT_ARGB1555, .drm_fmt = DRM_FORMAT_ARGB1555,
.de2_fmt = SUN8I_MIXER_FBFMT_ARGB1555, .de2_fmt = SUN8I_MIXER_FBFMT_ARGB1555,
.csc = SUN8I_CSC_MODE_OFF,
}, },
{ {
/* for DE2 VI layer which ignores alpha */ /* for DE2 VI layer which ignores alpha */
.drm_fmt = DRM_FORMAT_XRGB1555, .drm_fmt = DRM_FORMAT_XRGB1555,
.de2_fmt = SUN8I_MIXER_FBFMT_ARGB1555, .de2_fmt = SUN8I_MIXER_FBFMT_ARGB1555,
.csc = SUN8I_CSC_MODE_OFF,
}, },
{ {
.drm_fmt = DRM_FORMAT_ABGR1555, .drm_fmt = DRM_FORMAT_ABGR1555,
.de2_fmt = SUN8I_MIXER_FBFMT_ABGR1555, .de2_fmt = SUN8I_MIXER_FBFMT_ABGR1555,
.csc = SUN8I_CSC_MODE_OFF,
}, },
{ {
/* for DE2 VI layer which ignores alpha */ /* for DE2 VI layer which ignores alpha */
.drm_fmt = DRM_FORMAT_XBGR1555, .drm_fmt = DRM_FORMAT_XBGR1555,
.de2_fmt = SUN8I_MIXER_FBFMT_ABGR1555, .de2_fmt = SUN8I_MIXER_FBFMT_ABGR1555,
.csc = SUN8I_CSC_MODE_OFF,
}, },
{ {
.drm_fmt = DRM_FORMAT_RGBA5551, .drm_fmt = DRM_FORMAT_RGBA5551,
.de2_fmt = SUN8I_MIXER_FBFMT_RGBA5551, .de2_fmt = SUN8I_MIXER_FBFMT_RGBA5551,
.csc = SUN8I_CSC_MODE_OFF,
}, },
{ {
/* for DE2 VI layer which ignores alpha */ /* for DE2 VI layer which ignores alpha */
.drm_fmt = DRM_FORMAT_RGBX5551, .drm_fmt = DRM_FORMAT_RGBX5551,
.de2_fmt = SUN8I_MIXER_FBFMT_RGBA5551, .de2_fmt = SUN8I_MIXER_FBFMT_RGBA5551,
.csc = SUN8I_CSC_MODE_OFF,
}, },
{ {
.drm_fmt = DRM_FORMAT_BGRA5551, .drm_fmt = DRM_FORMAT_BGRA5551,
.de2_fmt = SUN8I_MIXER_FBFMT_BGRA5551, .de2_fmt = SUN8I_MIXER_FBFMT_BGRA5551,
.csc = SUN8I_CSC_MODE_OFF,
}, },
{ {
/* for DE2 VI layer which ignores alpha */ /* for DE2 VI layer which ignores alpha */
.drm_fmt = DRM_FORMAT_BGRX5551, .drm_fmt = DRM_FORMAT_BGRX5551,
.de2_fmt = SUN8I_MIXER_FBFMT_BGRA5551, .de2_fmt = SUN8I_MIXER_FBFMT_BGRA5551,
.csc = SUN8I_CSC_MODE_OFF,
}, },
{ {
.drm_fmt = DRM_FORMAT_ARGB2101010, .drm_fmt = DRM_FORMAT_ARGB2101010,
.de2_fmt = SUN8I_MIXER_FBFMT_ARGB2101010, .de2_fmt = SUN8I_MIXER_FBFMT_ARGB2101010,
.csc = SUN8I_CSC_MODE_OFF,
}, },
{ {
.drm_fmt = DRM_FORMAT_ABGR2101010, .drm_fmt = DRM_FORMAT_ABGR2101010,
.de2_fmt = SUN8I_MIXER_FBFMT_ABGR2101010, .de2_fmt = SUN8I_MIXER_FBFMT_ABGR2101010,
.csc = SUN8I_CSC_MODE_OFF,
}, },
{ {
.drm_fmt = DRM_FORMAT_RGBA1010102, .drm_fmt = DRM_FORMAT_RGBA1010102,
.de2_fmt = SUN8I_MIXER_FBFMT_RGBA1010102, .de2_fmt = SUN8I_MIXER_FBFMT_RGBA1010102,
.csc = SUN8I_CSC_MODE_OFF,
}, },
{ {
.drm_fmt = DRM_FORMAT_BGRA1010102, .drm_fmt = DRM_FORMAT_BGRA1010102,
.de2_fmt = SUN8I_MIXER_FBFMT_BGRA1010102, .de2_fmt = SUN8I_MIXER_FBFMT_BGRA1010102,
.csc = SUN8I_CSC_MODE_OFF,
}, },
{ {
.drm_fmt = DRM_FORMAT_UYVY, .drm_fmt = DRM_FORMAT_UYVY,
.de2_fmt = SUN8I_MIXER_FBFMT_UYVY, .de2_fmt = SUN8I_MIXER_FBFMT_UYVY,
.csc = SUN8I_CSC_MODE_YUV2RGB,
}, },
{ {
.drm_fmt = DRM_FORMAT_VYUY, .drm_fmt = DRM_FORMAT_VYUY,
.de2_fmt = SUN8I_MIXER_FBFMT_VYUY, .de2_fmt = SUN8I_MIXER_FBFMT_VYUY,
.csc = SUN8I_CSC_MODE_YUV2RGB,
}, },
{ {
.drm_fmt = DRM_FORMAT_YUYV, .drm_fmt = DRM_FORMAT_YUYV,
.de2_fmt = SUN8I_MIXER_FBFMT_YUYV, .de2_fmt = SUN8I_MIXER_FBFMT_YUYV,
.csc = SUN8I_CSC_MODE_YUV2RGB,
}, },
{ {
.drm_fmt = DRM_FORMAT_YVYU, .drm_fmt = DRM_FORMAT_YVYU,
.de2_fmt = SUN8I_MIXER_FBFMT_YVYU, .de2_fmt = SUN8I_MIXER_FBFMT_YVYU,
.csc = SUN8I_CSC_MODE_YUV2RGB,
}, },
{ {
.drm_fmt = DRM_FORMAT_NV16, .drm_fmt = DRM_FORMAT_NV16,
.de2_fmt = SUN8I_MIXER_FBFMT_NV16, .de2_fmt = SUN8I_MIXER_FBFMT_NV16,
.csc = SUN8I_CSC_MODE_YUV2RGB,
}, },
{ {
.drm_fmt = DRM_FORMAT_NV61, .drm_fmt = DRM_FORMAT_NV61,
.de2_fmt = SUN8I_MIXER_FBFMT_NV61, .de2_fmt = SUN8I_MIXER_FBFMT_NV61,
.csc = SUN8I_CSC_MODE_YUV2RGB,
}, },
{ {
.drm_fmt = DRM_FORMAT_NV12, .drm_fmt = DRM_FORMAT_NV12,
.de2_fmt = SUN8I_MIXER_FBFMT_NV12, .de2_fmt = SUN8I_MIXER_FBFMT_NV12,
.csc = SUN8I_CSC_MODE_YUV2RGB,
}, },
{ {
.drm_fmt = DRM_FORMAT_NV21, .drm_fmt = DRM_FORMAT_NV21,
.de2_fmt = SUN8I_MIXER_FBFMT_NV21, .de2_fmt = SUN8I_MIXER_FBFMT_NV21,
.csc = SUN8I_CSC_MODE_YUV2RGB,
}, },
{ {
.drm_fmt = DRM_FORMAT_YUV422, .drm_fmt = DRM_FORMAT_YUV422,
.de2_fmt = SUN8I_MIXER_FBFMT_YUV422, .de2_fmt = SUN8I_MIXER_FBFMT_YUV422,
.csc = SUN8I_CSC_MODE_YUV2RGB,
}, },
{ {
.drm_fmt = DRM_FORMAT_YUV420, .drm_fmt = DRM_FORMAT_YUV420,
.de2_fmt = SUN8I_MIXER_FBFMT_YUV420, .de2_fmt = SUN8I_MIXER_FBFMT_YUV420,
.csc = SUN8I_CSC_MODE_YUV2RGB,
}, },
{ {
.drm_fmt = DRM_FORMAT_YUV411, .drm_fmt = DRM_FORMAT_YUV411,
.de2_fmt = SUN8I_MIXER_FBFMT_YUV411, .de2_fmt = SUN8I_MIXER_FBFMT_YUV411,
.csc = SUN8I_CSC_MODE_YUV2RGB,
}, },
{ {
.drm_fmt = DRM_FORMAT_YVU422, .drm_fmt = DRM_FORMAT_YVU422,
.de2_fmt = SUN8I_MIXER_FBFMT_YUV422, .de2_fmt = SUN8I_MIXER_FBFMT_YUV422,
.csc = SUN8I_CSC_MODE_YVU2RGB,
}, },
{ {
.drm_fmt = DRM_FORMAT_YVU420, .drm_fmt = DRM_FORMAT_YVU420,
.de2_fmt = SUN8I_MIXER_FBFMT_YUV420, .de2_fmt = SUN8I_MIXER_FBFMT_YUV420,
.csc = SUN8I_CSC_MODE_YVU2RGB,
}, },
{ {
.drm_fmt = DRM_FORMAT_YVU411, .drm_fmt = DRM_FORMAT_YVU411,
.de2_fmt = SUN8I_MIXER_FBFMT_YUV411, .de2_fmt = SUN8I_MIXER_FBFMT_YUV411,
.csc = SUN8I_CSC_MODE_YVU2RGB,
}, },
{ {
.drm_fmt = DRM_FORMAT_P010, .drm_fmt = DRM_FORMAT_P010,
.de2_fmt = SUN8I_MIXER_FBFMT_P010_YUV, .de2_fmt = SUN8I_MIXER_FBFMT_P010_YUV,
.csc = SUN8I_CSC_MODE_YUV2RGB,
}, },
{ {
.drm_fmt = DRM_FORMAT_P210, .drm_fmt = DRM_FORMAT_P210,
.de2_fmt = SUN8I_MIXER_FBFMT_P210_YUV, .de2_fmt = SUN8I_MIXER_FBFMT_P210_YUV,
.csc = SUN8I_CSC_MODE_YUV2RGB,
}, },
}; };

6
drivers/gpu/drm/sun4i/sun8i_mixer.h
View file

@ -10,7 +10,6 @@
#include <linux/regmap.h> #include <linux/regmap.h>
#include <linux/reset.h> #include <linux/reset.h>
#include "sun8i_csc.h"
#include "sunxi_engine.h" #include "sunxi_engine.h"
#define SUN8I_MIXER_SIZE(w, h) (((h) - 1) << 16 | ((w) - 1)) #define SUN8I_MIXER_SIZE(w, h) (((h) - 1) << 16 | ((w) - 1))
@ -145,9 +144,8 @@
#define SUN50I_MIXER_CDC1_EN 0xd8000 #define SUN50I_MIXER_CDC1_EN 0xd8000
struct de2_fmt_info { struct de2_fmt_info {
u32 drm_fmt; u32 drm_fmt;
u32 de2_fmt; u32 de2_fmt;
enum sun8i_csc_mode csc;
}; };
/** /**

24
drivers/gpu/drm/sun4i/sun8i_vi_layer.c
View file

@ -12,6 +12,7 @@
#include <drm/drm_plane_helper.h> #include <drm/drm_plane_helper.h>
#include <drm/drm_probe_helper.h> #include <drm/drm_probe_helper.h>
#include "sun8i_csc.h"
#include "sun8i_vi_layer.h" #include "sun8i_vi_layer.h"
#include "sun8i_mixer.h" #include "sun8i_mixer.h"
#include "sun8i_vi_scaler.h" #include "sun8i_vi_scaler.h"
@ -210,13 +211,29 @@ static int sun8i_vi_layer_update_coord(struct sun8i_mixer *mixer, int channel,
return 0; return 0;
} }
static bool sun8i_vi_layer_get_csc_mode(const struct drm_format_info *format)
{
if (!format->is_yuv)
return SUN8I_CSC_MODE_OFF;
switch (format->format) {
case DRM_FORMAT_YVU411:
case DRM_FORMAT_YVU420:
case DRM_FORMAT_YVU422:
case DRM_FORMAT_YVU444:
return SUN8I_CSC_MODE_YVU2RGB;
default:
return SUN8I_CSC_MODE_YUV2RGB;
}
}
static int sun8i_vi_layer_update_formats(struct sun8i_mixer *mixer, int channel, static int sun8i_vi_layer_update_formats(struct sun8i_mixer *mixer, int channel,
int overlay, struct drm_plane *plane) int overlay, struct drm_plane *plane)
{ {
struct drm_plane_state *state = plane->state; struct drm_plane_state *state = plane->state;
const struct de2_fmt_info *fmt_info; const struct de2_fmt_info *fmt_info;
const struct drm_format_info *fmt; const struct drm_format_info *fmt;
u32 val, ch_base; u32 val, ch_base, csc_mode;
ch_base = sun8i_channel_base(mixer, channel); ch_base = sun8i_channel_base(mixer, channel);
@ -232,8 +249,9 @@ static int sun8i_vi_layer_update_formats(struct sun8i_mixer *mixer, int channel,
SUN8I_MIXER_CHAN_VI_LAYER_ATTR(ch_base, overlay), SUN8I_MIXER_CHAN_VI_LAYER_ATTR(ch_base, overlay),
SUN8I_MIXER_CHAN_VI_LAYER_ATTR_FBFMT_MASK, val); SUN8I_MIXER_CHAN_VI_LAYER_ATTR_FBFMT_MASK, val);
if (fmt_info->csc != SUN8I_CSC_MODE_OFF) { csc_mode = sun8i_vi_layer_get_csc_mode(fmt);
sun8i_csc_set_ccsc_coefficients(mixer, channel, fmt_info->csc, if (csc_mode != SUN8I_CSC_MODE_OFF) {
sun8i_csc_set_ccsc_coefficients(mixer, channel, csc_mode,
state->color_encoding, state->color_encoding,
state->color_range); state->color_range);
sun8i_csc_enable_ccsc(mixer, channel, true); sun8i_csc_enable_ccsc(mixer, channel, true);