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x86/apic: Use u32 for wakeup_secondary_cpu[_64]()

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APIC IDs are used with random data types u16, u32, int, unsigned int,
unsigned long.

Make it all consistently use u32 because that reflects the hardware
register width.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Juergen Gross <jgross@suse.com>
Tested-by: Sohil Mehta <sohil.mehta@intel.com>
Tested-by: Michael Kelley <mikelley@microsoft.com>
Tested-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Tested-by: Zhang Rui <rui.zhang@intel.com>
Reviewed-by: Arjan van de Ven <arjan@linux.intel.com>
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lore.kernel.org/r/20230814085113.233274223@linutronix.de
This commit is contained in:
Thomas Gleixner 2023-08-14 10:18:45 +02:00
parent 59f7928cd4
commit db4a4086a2
7 changed files with 10 additions and 10 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

2
arch/x86/hyperv/hv_vtl.c
View file

@ -196,7 +196,7 @@ static int hv_vtl_apicid_to_vp_id(u32 apic_id)
return ret; return ret;
} }
static int hv_vtl_wakeup_secondary_cpu(int apicid, unsigned long start_eip) static int hv_vtl_wakeup_secondary_cpu(u32 apicid, unsigned long start_eip)
{ {
int vp_id; int vp_id;

8
arch/x86/include/asm/apic.h
View file

@ -302,9 +302,9 @@ struct apic {
u32 (*set_apic_id)(u32 apicid); u32 (*set_apic_id)(u32 apicid);
/* wakeup_secondary_cpu */ /* wakeup_secondary_cpu */
int (*wakeup_secondary_cpu)(int apicid, unsigned long start_eip); int (*wakeup_secondary_cpu)(u32 apicid, unsigned long start_eip);
/* wakeup secondary CPU using 64-bit wakeup point */ /* wakeup secondary CPU using 64-bit wakeup point */
int (*wakeup_secondary_cpu_64)(int apicid, unsigned long start_eip); int (*wakeup_secondary_cpu_64)(u32 apicid, unsigned long start_eip);
char *name; char *name;
}; };
@ -322,8 +322,8 @@ struct apic_override {
void (*send_IPI_self)(int vector); void (*send_IPI_self)(int vector);
u64 (*icr_read)(void); u64 (*icr_read)(void);
void (*icr_write)(u32 low, u32 high); void (*icr_write)(u32 low, u32 high);
int (*wakeup_secondary_cpu)(int apicid, unsigned long start_eip); int (*wakeup_secondary_cpu)(u32 apicid, unsigned long start_eip);
int (*wakeup_secondary_cpu_64)(int apicid, unsigned long start_eip); int (*wakeup_secondary_cpu_64)(u32 apicid, unsigned long start_eip);
}; };
/* /*

2
arch/x86/kernel/acpi/boot.c
View file

@ -359,7 +359,7 @@ acpi_parse_lapic_nmi(union acpi_subtable_headers * header, const unsigned long e
} }
#ifdef CONFIG_X86_64 #ifdef CONFIG_X86_64
static int acpi_wakeup_cpu(int apicid, unsigned long start_ip) static int acpi_wakeup_cpu(u32 apicid, unsigned long start_ip)
{ {
/* /*
* Remap mailbox memory only for the first call to acpi_wakeup_cpu(). * Remap mailbox memory only for the first call to acpi_wakeup_cpu().

2
arch/x86/kernel/apic/apic_noop.c
View file

@ -27,7 +27,7 @@ static void noop_send_IPI_allbutself(int vector) { }
static void noop_send_IPI_all(int vector) { } static void noop_send_IPI_all(int vector) { }
static void noop_send_IPI_self(int vector) { } static void noop_send_IPI_self(int vector) { }
static void noop_apic_icr_write(u32 low, u32 id) { } static void noop_apic_icr_write(u32 low, u32 id) { }
static int noop_wakeup_secondary_cpu(int apicid, unsigned long start_eip) { return -1; } static int noop_wakeup_secondary_cpu(u32 apicid, unsigned long start_eip) { return -1; }
static u64 noop_apic_icr_read(void) { return 0; } static u64 noop_apic_icr_read(void) { return 0; }
static u32 noop_phys_pkg_id(u32 cpuid_apic, int index_msb) { return 0; } static u32 noop_phys_pkg_id(u32 cpuid_apic, int index_msb) { return 0; }
static u32 noop_get_apic_id(u32 apicid) { return 0; } static u32 noop_get_apic_id(u32 apicid) { return 0; }

2
arch/x86/kernel/apic/apic_numachip.c
View file

@ -71,7 +71,7 @@ static void numachip2_apic_icr_write(int apicid, unsigned int val)
numachip2_write32_lcsr(NUMACHIP2_APIC_ICR, (apicid << 12) | val); numachip2_write32_lcsr(NUMACHIP2_APIC_ICR, (apicid << 12) | val);
} }
static int numachip_wakeup_secondary(int phys_apicid, unsigned long start_rip) static int numachip_wakeup_secondary(u32 phys_apicid, unsigned long start_rip)
{ {
numachip_apic_icr_write(phys_apicid, APIC_DM_INIT); numachip_apic_icr_write(phys_apicid, APIC_DM_INIT);
numachip_apic_icr_write(phys_apicid, APIC_DM_STARTUP | numachip_apic_icr_write(phys_apicid, APIC_DM_STARTUP |

2
arch/x86/kernel/apic/x2apic_uv_x.c
View file

@ -701,7 +701,7 @@ static __init void build_uv_gr_table(void)
} }
} }
static int uv_wakeup_secondary(int phys_apicid, unsigned long start_rip) static int uv_wakeup_secondary(u32 phys_apicid, unsigned long start_rip)
{ {
unsigned long val; unsigned long val;
int pnode; int pnode;

2
arch/x86/kernel/sev.c
View file

@ -940,7 +940,7 @@ static void snp_cleanup_vmsa(struct sev_es_save_area *vmsa)
free_page((unsigned long)vmsa); free_page((unsigned long)vmsa);
} }
static int wakeup_cpu_via_vmgexit(int apic_id, unsigned long start_ip) static int wakeup_cpu_via_vmgexit(u32 apic_id, unsigned long start_ip)
{ {
struct sev_es_save_area *cur_vmsa, *vmsa; struct sev_es_save_area *cur_vmsa, *vmsa;
struct ghcb_state state; struct ghcb_state state;