phy: mscc: Add support for RGMII delay configuration
Add support for optional rx/tx-internal-delay-ps from devicetree. - When rx/tx-internal-delay-ps is/are specified, these take priority - When either is absent, 1) use 2ns for respective settings if rgmii-id/rxid/txid is/are present 2) use 0.2ns for respective settings if mode is rgmii Signed-off-by: Harini Katakam <harini.katakam@amd.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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31605c01fb
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1 changed files with 29 additions and 6 deletions
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@ -107,6 +107,9 @@ static const struct vsc8531_edge_rate_table edge_table[] = {
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};
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};
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#endif
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#endif
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static const int vsc85xx_internal_delay[] = {200, 800, 1100, 1700, 2000, 2300,
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2600, 3400};
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static int vsc85xx_phy_read_page(struct phy_device *phydev)
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static int vsc85xx_phy_read_page(struct phy_device *phydev)
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{
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{
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return __phy_read(phydev, MSCC_EXT_PAGE_ACCESS);
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return __phy_read(phydev, MSCC_EXT_PAGE_ACCESS);
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@ -525,8 +528,12 @@ static int vsc85xx_update_rgmii_cntl(struct phy_device *phydev, u32 rgmii_cntl,
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{
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{
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u16 rgmii_rx_delay_pos = ffs(rgmii_rx_delay_mask) - 1;
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u16 rgmii_rx_delay_pos = ffs(rgmii_rx_delay_mask) - 1;
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u16 rgmii_tx_delay_pos = ffs(rgmii_tx_delay_mask) - 1;
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u16 rgmii_tx_delay_pos = ffs(rgmii_tx_delay_mask) - 1;
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int delay_size = ARRAY_SIZE(vsc85xx_internal_delay);
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struct device *dev = &phydev->mdio.dev;
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u16 reg_val = 0;
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u16 reg_val = 0;
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u16 mask = 0;
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u16 mask = 0;
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s32 rx_delay;
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s32 tx_delay;
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int rc = 0;
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int rc = 0;
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/* For traffic to pass, the VSC8502 family needs the RX_CLK disable bit
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/* For traffic to pass, the VSC8502 family needs the RX_CLK disable bit
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@ -541,12 +548,28 @@ static int vsc85xx_update_rgmii_cntl(struct phy_device *phydev, u32 rgmii_cntl,
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if (phy_interface_is_rgmii(phydev))
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if (phy_interface_is_rgmii(phydev))
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mask |= rgmii_rx_delay_mask | rgmii_tx_delay_mask;
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mask |= rgmii_rx_delay_mask | rgmii_tx_delay_mask;
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rx_delay = phy_get_internal_delay(phydev, dev, vsc85xx_internal_delay,
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delay_size, true);
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if (rx_delay < 0) {
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if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID ||
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if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID ||
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phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
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phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
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reg_val |= RGMII_CLK_DELAY_2_0_NS << rgmii_rx_delay_pos;
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rx_delay = RGMII_CLK_DELAY_2_0_NS;
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else
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rx_delay = RGMII_CLK_DELAY_0_2_NS;
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}
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tx_delay = phy_get_internal_delay(phydev, dev, vsc85xx_internal_delay,
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delay_size, false);
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if (tx_delay < 0) {
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if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID ||
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if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID ||
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phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
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phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
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reg_val |= RGMII_CLK_DELAY_2_0_NS << rgmii_tx_delay_pos;
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rx_delay = RGMII_CLK_DELAY_2_0_NS;
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else
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rx_delay = RGMII_CLK_DELAY_0_2_NS;
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}
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reg_val |= rx_delay << rgmii_rx_delay_pos;
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reg_val |= tx_delay << rgmii_tx_delay_pos;
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if (mask)
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if (mask)
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rc = phy_modify_paged(phydev, MSCC_PHY_PAGE_EXTENDED_2,
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rc = phy_modify_paged(phydev, MSCC_PHY_PAGE_EXTENDED_2,
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