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arm64: dts: zynqmp: Rename buses to be align with simple-bus yaml

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Rename amba-apu and amba to AXI. Based on Xilinx ZynqMP TRM (Chapter 15)
chip is "using the advanced eXtensible interface (AXI) point-to-point
channels for communicating addresses, data, and response transactions
between master and slave clients."

Issues are reported as:
...: amba: $nodename:0: 'amba' does not match
'^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
	From schema: .../dt-schema/dtschema/schemas/simple-bus.yaml
...: amba-apu@0: $nodename:0: 'amba-apu@0' does not match
'^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
	From schema: .../dt-schema/dtschema/schemas/simple-bus.yaml

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/68f20a2b2bb0feee80bc3348619c2ee98aa69963.1598263539.git.michal.simek@xilinx.com
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
This commit is contained in:
Michal Simek 2020-08-24 12:05:42 +02:00
parent cbf5a878ae
commit dfff9066e6
1 changed files with 2 additions and 2 deletions
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4
arch/arm64/boot/dts/xilinx/zynqmp.dtsi
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@ -183,7 +183,7 @@
ranges;
};
amba_apu: amba-apu@0 {
amba_apu: axi@0 {
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <1>;
@ -202,7 +202,7 @@
};
};
amba: amba {
amba: axi {
compatible = "simple-bus";
#address-cells = <2>;
#size-cells = <2>;