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EDAC/amd64: Add support for AMD Family 19h Models 10h-1Fh and A0h-AFh

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Add a new family type for AMD Family 19h Models 10h to 1Fh. Use this new
family type for Models A0h to AFh also.

Increase the maximum number of controllers from 8 to 12.

Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Link: https://lore.kernel.org/r/20211208174356.1997855-3-yazen.ghannam@amd.com
This commit is contained in:
Yazen Ghannam 2021-12-08 17:43:54 +00:00 • committed by Borislav Petkov
parent f957112423
commit e2be5955a8
2 changed files with 24 additions and 2 deletions
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21
drivers/edac/amd64_edac.c
View file

@ -2650,6 +2650,16 @@ static struct amd64_family_type family_types[] = {
.dbam_to_cs = f17_addr_mask_to_cs_size, .dbam_to_cs = f17_addr_mask_to_cs_size,
} }
}, },
[F19_M10H_CPUS] = {
.ctl_name = "F19h_M10h",
.f0_id = PCI_DEVICE_ID_AMD_19H_M10H_DF_F0,
.f6_id = PCI_DEVICE_ID_AMD_19H_M10H_DF_F6,
.max_mcs = 12,
.ops = {
.early_channel_count = f17_early_channel_count,
.dbam_to_cs = f17_addr_mask_to_cs_size,
}
},
}; };
/* /*
@ -3687,11 +3697,20 @@ static struct amd64_family_type *per_family_init(struct amd64_pvt *pvt)
break; break;
case 0x19: case 0x19:
if (pvt->model >= 0x20 && pvt->model <= 0x2f) { if (pvt->model >= 0x10 && pvt->model <= 0x1f) {
fam_type = &family_types[F19_M10H_CPUS];
pvt->ops = &family_types[F19_M10H_CPUS].ops;
break;
} else if (pvt->model >= 0x20 && pvt->model <= 0x2f) {
fam_type = &family_types[F17_M70H_CPUS]; fam_type = &family_types[F17_M70H_CPUS];
pvt->ops = &family_types[F17_M70H_CPUS].ops; pvt->ops = &family_types[F17_M70H_CPUS].ops;
fam_type->ctl_name = "F19h_M20h"; fam_type->ctl_name = "F19h_M20h";
break; break;
} else if (pvt->model >= 0xa0 && pvt->model <= 0xaf) {
fam_type = &family_types[F19_M10H_CPUS];
pvt->ops = &family_types[F19_M10H_CPUS].ops;
fam_type->ctl_name = "F19h_MA0h";
break;
} }
fam_type = &family_types[F19_CPUS]; fam_type = &family_types[F19_CPUS];
pvt->ops = &family_types[F19_CPUS].ops; pvt->ops = &family_types[F19_CPUS].ops;

5
drivers/edac/amd64_edac.h
View file

@ -96,7 +96,7 @@
/* Hardware limit on ChipSelect rows per MC and processors per system */ /* Hardware limit on ChipSelect rows per MC and processors per system */
#define NUM_CHIPSELECTS 8 #define NUM_CHIPSELECTS 8
#define DRAM_RANGES 8 #define DRAM_RANGES 8
#define NUM_CONTROLLERS 8 #define NUM_CONTROLLERS 12
#define ON true #define ON true
#define OFF false #define OFF false
@ -126,6 +126,8 @@
#define PCI_DEVICE_ID_AMD_17H_M70H_DF_F6 0x1446 #define PCI_DEVICE_ID_AMD_17H_M70H_DF_F6 0x1446
#define PCI_DEVICE_ID_AMD_19H_DF_F0 0x1650 #define PCI_DEVICE_ID_AMD_19H_DF_F0 0x1650
#define PCI_DEVICE_ID_AMD_19H_DF_F6 0x1656 #define PCI_DEVICE_ID_AMD_19H_DF_F6 0x1656
#define PCI_DEVICE_ID_AMD_19H_M10H_DF_F0 0x14ad
#define PCI_DEVICE_ID_AMD_19H_M10H_DF_F6 0x14b3
/* /*
* Function 1 - Address Map * Function 1 - Address Map
@ -298,6 +300,7 @@ enum amd_families {
F17_M60H_CPUS, F17_M60H_CPUS,
F17_M70H_CPUS, F17_M70H_CPUS,
F19_CPUS, F19_CPUS,
F19_M10H_CPUS,
NUM_FAMILIES, NUM_FAMILIES,
}; };