drm/panel: ltk050h3146w: add support for Leadtek LTK050H3148W-CTA6 variant
The LTK050H3148W-CTA6 is a 5.0" 720x1280 DSI display, whose driving controller is a Himax HX8394-F, slightly different from LTK050H3146W by its init sequence, mode details and mode flags. Cc: Quentin Schulz <foss+kernel@0leil.net> Signed-off-by: Klaus Goger <klaus.goger@theobroma-systems.com> Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com> Reviewed-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://patchwork.freedesktop.org/patch/msgid/20220131164723.714836-2-quentin.schulz@theobroma-systems.com
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@ -244,6 +244,91 @@ struct ltk050h3146w *panel_to_ltk050h3146w(struct drm_panel *panel)
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return container_of(panel, struct ltk050h3146w, panel);
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}
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static int ltk050h3148w_init_sequence(struct ltk050h3146w *ctx)
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{
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struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
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int ret;
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/*
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* Init sequence was supplied by the panel vendor without much
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* documentation.
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*/
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mipi_dsi_dcs_write_seq(dsi, 0xb9, 0xff, 0x83, 0x94);
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mipi_dsi_dcs_write_seq(dsi, 0xb1, 0x50, 0x15, 0x75, 0x09, 0x32, 0x44,
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0x71, 0x31, 0x55, 0x2f);
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mipi_dsi_dcs_write_seq(dsi, 0xba, 0x63, 0x03, 0x68, 0x6b, 0xb2, 0xc0);
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mipi_dsi_dcs_write_seq(dsi, 0xd2, 0x88);
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mipi_dsi_dcs_write_seq(dsi, 0xb2, 0x00, 0x80, 0x64, 0x10, 0x07);
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mipi_dsi_dcs_write_seq(dsi, 0xb4, 0x05, 0x70, 0x05, 0x70, 0x01, 0x70,
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0x01, 0x0c, 0x86, 0x75, 0x00, 0x3f, 0x01, 0x74,
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0x01, 0x74, 0x01, 0x74, 0x01, 0x0c, 0x86);
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mipi_dsi_dcs_write_seq(dsi, 0xd3, 0x00, 0x00, 0x07, 0x07, 0x40, 0x1e,
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0x08, 0x00, 0x32, 0x10, 0x08, 0x00, 0x08, 0x54,
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0x15, 0x10, 0x05, 0x04, 0x02, 0x12, 0x10, 0x05,
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0x07, 0x33, 0x34, 0x0c, 0x0c, 0x37, 0x10, 0x07,
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0x17, 0x11, 0x40);
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mipi_dsi_dcs_write_seq(dsi, 0xd5, 0x19, 0x19, 0x18, 0x18, 0x1b, 0x1b,
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0x1a, 0x1a, 0x04, 0x05, 0x06, 0x07, 0x00, 0x01,
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0x02, 0x03, 0x20, 0x21, 0x18, 0x18, 0x22, 0x23,
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0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
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0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
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0x18, 0x18, 0x18, 0x18, 0x18, 0x18);
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mipi_dsi_dcs_write_seq(dsi, 0xd6, 0x18, 0x18, 0x19, 0x19, 0x1b, 0x1b,
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0x1a, 0x1a, 0x03, 0x02, 0x01, 0x00, 0x07, 0x06,
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0x05, 0x04, 0x23, 0x22, 0x18, 0x18, 0x21, 0x20,
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0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
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0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
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0x18, 0x18, 0x18, 0x18, 0x18, 0x18);
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mipi_dsi_dcs_write_seq(dsi, 0xe0, 0x00, 0x03, 0x09, 0x11, 0x11, 0x14,
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0x18, 0x16, 0x2e, 0x3d, 0x4d, 0x4d, 0x58, 0x6c,
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0x72, 0x78, 0x88, 0x8b, 0x86, 0xa4, 0xb2, 0x58,
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0x55, 0x59, 0x5b, 0x5d, 0x60, 0x64, 0x7f, 0x00,
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0x03, 0x09, 0x0f, 0x11, 0x14, 0x18, 0x16, 0x2e,
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0x3d, 0x4d, 0x4d, 0x58, 0x6d, 0x73, 0x78, 0x88,
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0x8b, 0x87, 0xa5, 0xb2, 0x58, 0x55, 0x58, 0x5b,
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0x5d, 0x61, 0x65, 0x7f);
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mipi_dsi_dcs_write_seq(dsi, 0xcc, 0x0b);
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mipi_dsi_dcs_write_seq(dsi, 0xc0, 0x1f, 0x31);
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mipi_dsi_dcs_write_seq(dsi, 0xb6, 0xc4, 0xc4);
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mipi_dsi_dcs_write_seq(dsi, 0xbd, 0x01);
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mipi_dsi_dcs_write_seq(dsi, 0xb1, 0x00);
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mipi_dsi_dcs_write_seq(dsi, 0xbd, 0x00);
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mipi_dsi_dcs_write_seq(dsi, 0xc6, 0xef);
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mipi_dsi_dcs_write_seq(dsi, 0xd4, 0x02);
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mipi_dsi_dcs_write_seq(dsi, 0x11);
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mipi_dsi_dcs_write_seq(dsi, 0x29);
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ret = mipi_dsi_dcs_set_tear_on(dsi, 1);
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if (ret < 0) {
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dev_err(ctx->dev, "failed to set tear on: %d\n", ret);
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return ret;
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}
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msleep(60);
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return 0;
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}
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static const struct drm_display_mode ltk050h3148w_mode = {
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.hdisplay = 720,
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.hsync_start = 720 + 12,
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.hsync_end = 720 + 12 + 6,
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.htotal = 720 + 12 + 6 + 24,
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.vdisplay = 1280,
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.vsync_start = 1280 + 9,
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.vsync_end = 1280 + 9 + 2,
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.vtotal = 1280 + 9 + 2 + 16,
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.clock = 59756,
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.width_mm = 62,
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.height_mm = 110,
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};
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static const struct ltk050h3146w_desc ltk050h3148w_data = {
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.mode = <k050h3148w_mode,
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.init = ltk050h3148w_init_sequence,
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.mode_flags = MIPI_DSI_MODE_VIDEO_SYNC_PULSE,
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};
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static int ltk050h3146w_init_sequence(struct ltk050h3146w *ctx)
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{
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struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
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@ -646,6 +731,10 @@ static const struct of_device_id ltk050h3146w_of_match[] = {
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.compatible = "leadtek,ltk050h3146w-a2",
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.data = <k050h3146w_a2_data,
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},
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{
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.compatible = "leadtek,ltk050h3148w",
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.data = <k050h3148w_data,
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},
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{ /* sentinel */ }
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};
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MODULE_DEVICE_TABLE(of, ltk050h3146w_of_match);
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