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usb: dwc2: clip max_transfer_size to 65535

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Clip max_transfer_size to 65535 for host. dwc2_hc_setup_align_buf()
allocates coherent buffers with this size, and if it's too large we
can exhaust the coherent DMA pool.

Tested on Raspberry Pi and Altera SOCFPGA.

Signed-off-by: Paul Zimmerman <paulz@synopsys.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Paul Zimmerman 2014-09-16 13:47:26 -07:00 • committed by Greg Kroah-Hartman
parent d00b414280
commit e8f8c14d9d
1 changed files with 7 additions and 0 deletions
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7
drivers/usb/dwc2/core.c
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@ -2743,6 +2743,13 @@ int dwc2_get_hwparams(struct dwc2_hsotg *hsotg)
width = (hwcfg3 & GHWCFG3_XFER_SIZE_CNTR_WIDTH_MASK) >> width = (hwcfg3 & GHWCFG3_XFER_SIZE_CNTR_WIDTH_MASK) >>
GHWCFG3_XFER_SIZE_CNTR_WIDTH_SHIFT; GHWCFG3_XFER_SIZE_CNTR_WIDTH_SHIFT;
hw->max_transfer_size = (1 << (width + 11)) - 1; hw->max_transfer_size = (1 << (width + 11)) - 1;
/*
* Clip max_transfer_size to 65535. dwc2_hc_setup_align_buf() allocates
* coherent buffers with this size, and if it's too large we can
* exhaust the coherent DMA pool.
*/
if (hw->max_transfer_size > 65535)
hw->max_transfer_size = 65535;
width = (hwcfg3 & GHWCFG3_PACKET_SIZE_CNTR_WIDTH_MASK) >> width = (hwcfg3 & GHWCFG3_PACKET_SIZE_CNTR_WIDTH_MASK) >>
GHWCFG3_PACKET_SIZE_CNTR_WIDTH_SHIFT; GHWCFG3_PACKET_SIZE_CNTR_WIDTH_SHIFT;
hw->max_packet_count = (1 << (width + 4)) - 1; hw->max_packet_count = (1 << (width + 4)) - 1;