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arm64: dts: rockchip: change gpio nodenames

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Currently all gpio nodenames are sort of identical to there label.
Nodenames should be of a generic type, so change them all.

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Link: https://lore.kernel.org/r/20211007144019.7461-3-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This commit is contained in:
Johan Jonker 2021-10-07 16:40:19 +02:00 • committed by Heiko Stuebner
parent 263b39bce2
commit ec3028e7c8
5 changed files with 22 additions and 22 deletions
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8
arch/arm64/boot/dts/rockchip/px30.dtsi
View file

@ -1338,7 +1338,7 @@
#size-cells = <2>;
ranges;
gpio0: gpio0@ff040000 {
gpio0: gpio@ff040000 {
compatible = "rockchip,gpio-bank";
reg = <0x0 0xff040000 0x0 0x100>;
interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
@ -1350,7 +1350,7 @@
#interrupt-cells = <2>;
};
gpio1: gpio1@ff250000 {
gpio1: gpio@ff250000 {
compatible = "rockchip,gpio-bank";
reg = <0x0 0xff250000 0x0 0x100>;
interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
@ -1362,7 +1362,7 @@
#interrupt-cells = <2>;
};
gpio2: gpio2@ff260000 {
gpio2: gpio@ff260000 {
compatible = "rockchip,gpio-bank";
reg = <0x0 0xff260000 0x0 0x100>;
interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
@ -1374,7 +1374,7 @@
#interrupt-cells = <2>;
};
gpio3: gpio3@ff270000 {
gpio3: gpio@ff270000 {
compatible = "rockchip,gpio-bank";
reg = <0x0 0xff270000 0x0 0x100>;
interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;

10
arch/arm64/boot/dts/rockchip/rk3308.dtsi
View file

@ -790,7 +790,7 @@
#size-cells = <2>;
ranges;
gpio0: gpio0@ff220000 {
gpio0: gpio@ff220000 {
compatible = "rockchip,gpio-bank";
reg = <0x0 0xff220000 0x0 0x100>;
interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
@ -801,7 +801,7 @@
#interrupt-cells = <2>;
};
gpio1: gpio1@ff230000 {
gpio1: gpio@ff230000 {
compatible = "rockchip,gpio-bank";
reg = <0x0 0xff230000 0x0 0x100>;
interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
@ -812,7 +812,7 @@
#interrupt-cells = <2>;
};
gpio2: gpio2@ff240000 {
gpio2: gpio@ff240000 {
compatible = "rockchip,gpio-bank";
reg = <0x0 0xff240000 0x0 0x100>;
interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
@ -823,7 +823,7 @@
#interrupt-cells = <2>;
};
gpio3: gpio3@ff250000 {
gpio3: gpio@ff250000 {
compatible = "rockchip,gpio-bank";
reg = <0x0 0xff250000 0x0 0x100>;
interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
@ -834,7 +834,7 @@
#interrupt-cells = <2>;
};
gpio4: gpio4@ff260000 {
gpio4: gpio@ff260000 {
compatible = "rockchip,gpio-bank";
reg = <0x0 0xff260000 0x0 0x100>;
interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;

8
arch/arm64/boot/dts/rockchip/rk3328.dtsi
View file

@ -1014,7 +1014,7 @@
#size-cells = <2>;
ranges;
gpio0: gpio0@ff210000 {
gpio0: gpio@ff210000 {
compatible = "rockchip,gpio-bank";
reg = <0x0 0xff210000 0x0 0x100>;
interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
@ -1027,7 +1027,7 @@
#interrupt-cells = <2>;
};
gpio1: gpio1@ff220000 {
gpio1: gpio@ff220000 {
compatible = "rockchip,gpio-bank";
reg = <0x0 0xff220000 0x0 0x100>;
interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
@ -1040,7 +1040,7 @@
#interrupt-cells = <2>;
};
gpio2: gpio2@ff230000 {
gpio2: gpio@ff230000 {
compatible = "rockchip,gpio-bank";
reg = <0x0 0xff230000 0x0 0x100>;
interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
@ -1053,7 +1053,7 @@
#interrupt-cells = <2>;
};
gpio3: gpio3@ff240000 {
gpio3: gpio@ff240000 {
compatible = "rockchip,gpio-bank";
reg = <0x0 0xff240000 0x0 0x100>;
interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;

8
arch/arm64/boot/dts/rockchip/rk3368.dtsi
View file

@ -975,7 +975,7 @@
#size-cells = <0x2>;
ranges;
gpio0: gpio0@ff750000 {
gpio0: gpio@ff750000 {
compatible = "rockchip,gpio-bank";
reg = <0x0 0xff750000 0x0 0x100>;
clocks = <&cru PCLK_GPIO0>;
@ -988,7 +988,7 @@
#interrupt-cells = <0x2>;
};
gpio1: gpio1@ff780000 {
gpio1: gpio@ff780000 {
compatible = "rockchip,gpio-bank";
reg = <0x0 0xff780000 0x0 0x100>;
clocks = <&cru PCLK_GPIO1>;
@ -1001,7 +1001,7 @@
#interrupt-cells = <0x2>;
};
gpio2: gpio2@ff790000 {
gpio2: gpio@ff790000 {
compatible = "rockchip,gpio-bank";
reg = <0x0 0xff790000 0x0 0x100>;
clocks = <&cru PCLK_GPIO2>;
@ -1014,7 +1014,7 @@
#interrupt-cells = <0x2>;
};
gpio3: gpio3@ff7a0000 {
gpio3: gpio@ff7a0000 {
compatible = "rockchip,gpio-bank";
reg = <0x0 0xff7a0000 0x0 0x100>;
clocks = <&cru PCLK_GPIO3>;

10
arch/arm64/boot/dts/rockchip/rk3399.dtsi
View file

@ -2026,7 +2026,7 @@
#size-cells = <2>;
ranges;
gpio0: gpio0@ff720000 {
gpio0: gpio@ff720000 {
compatible = "rockchip,gpio-bank";
reg = <0x0 0xff720000 0x0 0x100>;
clocks = <&pmucru PCLK_GPIO0_PMU>;
@ -2039,7 +2039,7 @@
#interrupt-cells = <0x2>;
};
gpio1: gpio1@ff730000 {
gpio1: gpio@ff730000 {
compatible = "rockchip,gpio-bank";
reg = <0x0 0xff730000 0x0 0x100>;
clocks = <&pmucru PCLK_GPIO1_PMU>;
@ -2052,7 +2052,7 @@
#interrupt-cells = <0x2>;
};
gpio2: gpio2@ff780000 {
gpio2: gpio@ff780000 {
compatible = "rockchip,gpio-bank";
reg = <0x0 0xff780000 0x0 0x100>;
clocks = <&cru PCLK_GPIO2>;
@ -2065,7 +2065,7 @@
#interrupt-cells = <0x2>;
};
gpio3: gpio3@ff788000 {
gpio3: gpio@ff788000 {
compatible = "rockchip,gpio-bank";
reg = <0x0 0xff788000 0x0 0x100>;
clocks = <&cru PCLK_GPIO3>;
@ -2078,7 +2078,7 @@
#interrupt-cells = <0x2>;
};
gpio4: gpio4@ff790000 {
gpio4: gpio@ff790000 {
compatible = "rockchip,gpio-bank";
reg = <0x0 0xff790000 0x0 0x100>;
clocks = <&cru PCLK_GPIO4>;