clk: bcm2835: Mark GPIO clocks enabled at boot as critical
These divide off of PLLD_PER and are used for the ethernet and wifi PHYs source PLLs. Neither of them is currently represented by a phy device that would grab the clock for us. This keeps other drivers from killing the networking PHYs when they disable their own clocks and trigger PLLD_PER's refcount going to 0. Signed-off-by: Eric Anholt <eric@anholt.net> Acked-by: Martin Sperl <kernel@martin.sperl.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
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1 changed files with 9 additions and 1 deletions
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@ -1239,6 +1239,12 @@ static struct clk *bcm2835_register_clock(struct bcm2835_cprman *cprman,
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} else {
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} else {
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init.ops = &bcm2835_clock_clk_ops;
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init.ops = &bcm2835_clock_clk_ops;
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init.flags |= CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE;
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init.flags |= CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE;
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/* If the clock wasn't actually enabled at boot, it's not
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* critical.
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*/
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if (!(cprman_read(cprman, data->ctl_reg) & CM_ENABLE))
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init.flags &= ~CLK_IS_CRITICAL;
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}
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}
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clock = devm_kzalloc(cprman->dev, sizeof(*clock), GFP_KERNEL);
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clock = devm_kzalloc(cprman->dev, sizeof(*clock), GFP_KERNEL);
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@ -1708,13 +1714,15 @@ static const struct bcm2835_clk_desc clk_desc_array[] = {
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.div_reg = CM_GP1DIV,
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.div_reg = CM_GP1DIV,
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.int_bits = 12,
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.int_bits = 12,
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.frac_bits = 12,
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.frac_bits = 12,
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.flags = CLK_IS_CRITICAL,
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.is_mash_clock = true),
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.is_mash_clock = true),
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[BCM2835_CLOCK_GP2] = REGISTER_PER_CLK(
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[BCM2835_CLOCK_GP2] = REGISTER_PER_CLK(
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.name = "gp2",
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.name = "gp2",
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.ctl_reg = CM_GP2CTL,
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.ctl_reg = CM_GP2CTL,
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.div_reg = CM_GP2DIV,
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.div_reg = CM_GP2DIV,
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.int_bits = 12,
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.int_bits = 12,
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.frac_bits = 12),
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.frac_bits = 12,
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.flags = CLK_IS_CRITICAL),
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/* HDMI state machine */
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/* HDMI state machine */
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[BCM2835_CLOCK_HSM] = REGISTER_PER_CLK(
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[BCM2835_CLOCK_HSM] = REGISTER_PER_CLK(
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