wifi: ath11k: support 2 station interfaces
Add hardware parameter support_dual_stations to indicate whether 2 station interfaces are supported. For chips which support this feature, limit total number of AP interface and mesh point to 1. The max interfaces are 3 for such chips. The chips affected are: QCA6390 hw2.0 WCN6855 hw2.0 WCN6855 hw2.1 Other chips are not affected. For affected chips, remove radar_detect_widths because now num_different_channels is set to 2. radar_detect_widths can be set only when num_different_channels is 1, see mac80211 function wiphy_verify_combinations for details. This means that in affectected chips DFS cannot be enabled in AP mode. Tested-on: WCN6855 hw2.0 PCI WLAN.HSP.1.1-03125-QCAHSPSWPL_V1_V2_SILICONZ_LITE-3 Signed-off-by: Carl Huang <quic_cjhuang@quicinc.com> Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com> Link: https://msgid.link/20230714023801.2621802-2-quic_cjhuang@quicinc.com
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4 changed files with 50 additions and 23 deletions
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@ -122,6 +122,7 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
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.tcl_ring_retry = true,
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.tcl_ring_retry = true,
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.tx_ring_size = DP_TCL_DATA_RING_SIZE,
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.tx_ring_size = DP_TCL_DATA_RING_SIZE,
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.smp2p_wow_exit = false,
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.smp2p_wow_exit = false,
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.support_dual_stations = false,
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},
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},
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{
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{
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.hw_rev = ATH11K_HW_IPQ6018_HW10,
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.hw_rev = ATH11K_HW_IPQ6018_HW10,
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@ -205,6 +206,7 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
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.tx_ring_size = DP_TCL_DATA_RING_SIZE,
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.tx_ring_size = DP_TCL_DATA_RING_SIZE,
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.smp2p_wow_exit = false,
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.smp2p_wow_exit = false,
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.support_fw_mac_sequence = false,
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.support_fw_mac_sequence = false,
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.support_dual_stations = false,
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},
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},
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{
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{
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.name = "qca6390 hw2.0",
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.name = "qca6390 hw2.0",
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@ -255,7 +257,7 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
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.coldboot_cal_ftm = false,
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.coldboot_cal_ftm = false,
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.cbcal_restart_fw = false,
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.cbcal_restart_fw = false,
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.fw_mem_mode = 0,
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.fw_mem_mode = 0,
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.num_vdevs = 16 + 1,
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.num_vdevs = 2 + 1,
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.num_peers = 512,
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.num_peers = 512,
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.supports_suspend = true,
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.supports_suspend = true,
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.hal_desc_sz = sizeof(struct hal_rx_desc_ipq8074),
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.hal_desc_sz = sizeof(struct hal_rx_desc_ipq8074),
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@ -290,6 +292,7 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
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.tx_ring_size = DP_TCL_DATA_RING_SIZE,
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.tx_ring_size = DP_TCL_DATA_RING_SIZE,
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.smp2p_wow_exit = false,
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.smp2p_wow_exit = false,
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.support_fw_mac_sequence = true,
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.support_fw_mac_sequence = true,
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.support_dual_stations = true,
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},
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},
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{
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{
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.name = "qcn9074 hw1.0",
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.name = "qcn9074 hw1.0",
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@ -372,6 +375,7 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
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.tx_ring_size = DP_TCL_DATA_RING_SIZE,
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.tx_ring_size = DP_TCL_DATA_RING_SIZE,
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.smp2p_wow_exit = false,
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.smp2p_wow_exit = false,
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.support_fw_mac_sequence = false,
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.support_fw_mac_sequence = false,
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.support_dual_stations = false,
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},
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},
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{
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{
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.name = "wcn6855 hw2.0",
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.name = "wcn6855 hw2.0",
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@ -422,7 +426,7 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
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.coldboot_cal_ftm = false,
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.coldboot_cal_ftm = false,
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.cbcal_restart_fw = false,
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.cbcal_restart_fw = false,
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.fw_mem_mode = 0,
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.fw_mem_mode = 0,
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.num_vdevs = 16 + 1,
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.num_vdevs = 2 + 1,
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.num_peers = 512,
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.num_peers = 512,
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.supports_suspend = true,
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.supports_suspend = true,
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.hal_desc_sz = sizeof(struct hal_rx_desc_wcn6855),
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.hal_desc_sz = sizeof(struct hal_rx_desc_wcn6855),
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@ -457,6 +461,7 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
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.tx_ring_size = DP_TCL_DATA_RING_SIZE,
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.tx_ring_size = DP_TCL_DATA_RING_SIZE,
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.smp2p_wow_exit = false,
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.smp2p_wow_exit = false,
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.support_fw_mac_sequence = true,
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.support_fw_mac_sequence = true,
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.support_dual_stations = true,
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},
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},
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{
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{
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.name = "wcn6855 hw2.1",
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.name = "wcn6855 hw2.1",
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@ -505,7 +510,7 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
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.coldboot_cal_ftm = false,
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.coldboot_cal_ftm = false,
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.cbcal_restart_fw = false,
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.cbcal_restart_fw = false,
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.fw_mem_mode = 0,
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.fw_mem_mode = 0,
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.num_vdevs = 16 + 1,
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.num_vdevs = 2 + 1,
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.num_peers = 512,
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.num_peers = 512,
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.supports_suspend = true,
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.supports_suspend = true,
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.hal_desc_sz = sizeof(struct hal_rx_desc_wcn6855),
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.hal_desc_sz = sizeof(struct hal_rx_desc_wcn6855),
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@ -540,6 +545,7 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
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.tx_ring_size = DP_TCL_DATA_RING_SIZE,
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.tx_ring_size = DP_TCL_DATA_RING_SIZE,
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.smp2p_wow_exit = false,
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.smp2p_wow_exit = false,
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.support_fw_mac_sequence = true,
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.support_fw_mac_sequence = true,
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.support_dual_stations = true,
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},
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},
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{
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{
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.name = "wcn6750 hw1.0",
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.name = "wcn6750 hw1.0",
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@ -621,6 +627,7 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
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.tx_ring_size = DP_TCL_DATA_RING_SIZE_WCN6750,
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.tx_ring_size = DP_TCL_DATA_RING_SIZE_WCN6750,
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.smp2p_wow_exit = true,
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.smp2p_wow_exit = true,
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.support_fw_mac_sequence = true,
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.support_fw_mac_sequence = true,
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.support_dual_stations = false,
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},
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},
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{
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{
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.hw_rev = ATH11K_HW_IPQ5018_HW10,
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.hw_rev = ATH11K_HW_IPQ5018_HW10,
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@ -702,6 +709,7 @@ static const struct ath11k_hw_params ath11k_hw_params[] = {
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.tx_ring_size = DP_TCL_DATA_RING_SIZE,
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.tx_ring_size = DP_TCL_DATA_RING_SIZE,
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.smp2p_wow_exit = false,
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.smp2p_wow_exit = false,
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.support_fw_mac_sequence = false,
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.support_fw_mac_sequence = false,
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.support_dual_stations = false,
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},
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},
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};
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};
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@ -58,7 +58,7 @@ static void ath11k_hw_wcn6855_tx_mesh_enable(struct ath11k_base *ab,
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static void ath11k_init_wmi_config_qca6390(struct ath11k_base *ab,
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static void ath11k_init_wmi_config_qca6390(struct ath11k_base *ab,
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struct target_resource_config *config)
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struct target_resource_config *config)
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{
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{
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config->num_vdevs = 4;
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config->num_vdevs = ab->hw_params.num_vdevs;
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config->num_peers = 16;
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config->num_peers = 16;
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config->num_tids = 32;
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config->num_tids = 32;
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@ -226,6 +226,7 @@ struct ath11k_hw_params {
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u32 tx_ring_size;
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u32 tx_ring_size;
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bool smp2p_wow_exit;
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bool smp2p_wow_exit;
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bool support_fw_mac_sequence;
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bool support_fw_mac_sequence;
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bool support_dual_stations;
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};
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};
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struct ath11k_hw_ops {
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struct ath11k_hw_ops {
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@ -9843,6 +9843,23 @@ static int ath11k_mac_setup_iface_combinations(struct ath11k *ar)
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return -ENOMEM;
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return -ENOMEM;
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}
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}
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if (ab->hw_params.support_dual_stations) {
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limits[0].max = 2;
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limits[0].types |= BIT(NL80211_IFTYPE_STATION);
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limits[1].max = 1;
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limits[1].types |= BIT(NL80211_IFTYPE_AP);
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if (IS_ENABLED(CONFIG_MAC80211_MESH) &&
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ab->hw_params.interface_modes & BIT(NL80211_IFTYPE_MESH_POINT))
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limits[1].types |= BIT(NL80211_IFTYPE_MESH_POINT);
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combinations[0].limits = limits;
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combinations[0].n_limits = 2;
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combinations[0].max_interfaces = ab->hw_params.num_vdevs;
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combinations[0].num_different_channels = 2;
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combinations[0].beacon_int_infra_match = true;
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combinations[0].beacon_int_min_gcd = 100;
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} else {
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limits[0].max = 1;
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limits[0].max = 1;
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limits[0].types |= BIT(NL80211_IFTYPE_STATION);
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limits[0].types |= BIT(NL80211_IFTYPE_STATION);
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@ -9854,7 +9871,7 @@ static int ath11k_mac_setup_iface_combinations(struct ath11k *ar)
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limits[1].types |= BIT(NL80211_IFTYPE_MESH_POINT);
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limits[1].types |= BIT(NL80211_IFTYPE_MESH_POINT);
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combinations[0].limits = limits;
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combinations[0].limits = limits;
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combinations[0].n_limits = n_limits;
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combinations[0].n_limits = 2;
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combinations[0].max_interfaces = 16;
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combinations[0].max_interfaces = 16;
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combinations[0].num_different_channels = 1;
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combinations[0].num_different_channels = 1;
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combinations[0].beacon_int_infra_match = true;
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combinations[0].beacon_int_infra_match = true;
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@ -9865,6 +9882,7 @@ static int ath11k_mac_setup_iface_combinations(struct ath11k *ar)
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BIT(NL80211_CHAN_WIDTH_80) |
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BIT(NL80211_CHAN_WIDTH_80) |
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BIT(NL80211_CHAN_WIDTH_80P80) |
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BIT(NL80211_CHAN_WIDTH_80P80) |
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BIT(NL80211_CHAN_WIDTH_160);
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BIT(NL80211_CHAN_WIDTH_160);
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}
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ar->hw->wiphy->iface_combinations = combinations;
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ar->hw->wiphy->iface_combinations = combinations;
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ar->hw->wiphy->n_iface_combinations = 1;
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ar->hw->wiphy->n_iface_combinations = 1;
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