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mirror of synced 2025-03-06 20:59:54 +01:00

net: pse-pd: tps23881: Add missing configuration register after disable

When setting the PWOFF register, the controller resets multiple
configuration registers. This patch ensures these registers are
reconfigured as needed following a disable operation.

Acked-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
This commit is contained in:
Kory Maincent 2025-01-10 10:40:25 +01:00 committed by Paolo Abeni
parent 4c2bab507e
commit f3cb3c7bea

View file

@ -130,6 +130,7 @@ static int tps23881_pi_disable(struct pse_controller_dev *pcdev, int id)
struct i2c_client *client = priv->client;
u8 chan;
u16 val;
int ret;
if (id >= TPS23881_MAX_CHANS)
return -ERANGE;
@ -143,7 +144,34 @@ static int tps23881_pi_disable(struct pse_controller_dev *pcdev, int id)
BIT(chan % 4));
}
return i2c_smbus_write_word_data(client, TPS23881_REG_PW_EN, val);
ret = i2c_smbus_write_word_data(client, TPS23881_REG_PW_EN, val);
if (ret)
return ret;
/* PWOFF command resets lots of register which need to be
* configured again. According to the datasheet "It may take upwards
* of 5ms after PWOFFn command for all register values to be updated"
*/
mdelay(5);
/* Enable detection and classification */
ret = i2c_smbus_read_word_data(client, TPS23881_REG_DET_CLA_EN);
if (ret < 0)
return ret;
chan = priv->port[id].chan[0];
val = tps23881_set_val(ret, chan, 0, BIT(chan % 4), BIT(chan % 4));
val = tps23881_set_val(val, chan, 4, BIT(chan % 4), BIT(chan % 4));
if (priv->port[id].is_4p) {
chan = priv->port[id].chan[1];
val = tps23881_set_val(ret, chan, 0, BIT(chan % 4),
BIT(chan % 4));
val = tps23881_set_val(val, chan, 4, BIT(chan % 4),
BIT(chan % 4));
}
return i2c_smbus_write_word_data(client, TPS23881_REG_DET_CLA_EN, val);
}
static int tps23881_pi_is_enabled(struct pse_controller_dev *pcdev, int id)