drm/msm: Add devcoredump support for a750
Add an a750 case to the various places where we choose a list of registers. Patchwork: https://patchwork.freedesktop.org/patch/592519/ Signed-off-by: Connor Abbott <cwabbott0@gmail.com> Patchwork: https://patchwork.freedesktop.org/patch/592519 Signed-off-by: Rob Clark <robdclark@chromium.org>
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1 changed files with 46 additions and 18 deletions
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@ -13,9 +13,11 @@
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*/
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*/
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#pragma GCC diagnostic push
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#pragma GCC diagnostic push
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#pragma GCC diagnostic ignored "-Wunused-variable"
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#pragma GCC diagnostic ignored "-Wunused-variable"
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#pragma GCC diagnostic ignored "-Wunused-const-variable"
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#include "adreno_gen7_0_0_snapshot.h"
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#include "adreno_gen7_0_0_snapshot.h"
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#include "adreno_gen7_2_0_snapshot.h"
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#include "adreno_gen7_2_0_snapshot.h"
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#include "adreno_gen7_9_0_snapshot.h"
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#pragma GCC diagnostic pop
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#pragma GCC diagnostic pop
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@ -384,21 +386,29 @@ static void a7xx_get_debugbus_blocks(struct msm_gpu *gpu,
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struct a6xx_gpu_state *a6xx_state)
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struct a6xx_gpu_state *a6xx_state)
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{
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{
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struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);
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struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);
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int debugbus_blocks_count, total_debugbus_blocks;
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int debugbus_blocks_count, gbif_debugbus_blocks_count, total_debugbus_blocks;
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const u32 *debugbus_blocks;
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const u32 *debugbus_blocks, *gbif_debugbus_blocks;
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int i;
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int i;
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if (adreno_is_a730(adreno_gpu)) {
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if (adreno_is_a730(adreno_gpu)) {
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debugbus_blocks = gen7_0_0_debugbus_blocks;
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debugbus_blocks = gen7_0_0_debugbus_blocks;
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debugbus_blocks_count = ARRAY_SIZE(gen7_0_0_debugbus_blocks);
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debugbus_blocks_count = ARRAY_SIZE(gen7_0_0_debugbus_blocks);
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} else {
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gbif_debugbus_blocks = a7xx_gbif_debugbus_blocks;
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BUG_ON(!adreno_is_a740_family(adreno_gpu));
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gbif_debugbus_blocks_count = ARRAY_SIZE(a7xx_gbif_debugbus_blocks);
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} else if (adreno_is_a740_family(adreno_gpu)) {
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debugbus_blocks = gen7_2_0_debugbus_blocks;
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debugbus_blocks = gen7_2_0_debugbus_blocks;
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debugbus_blocks_count = ARRAY_SIZE(gen7_2_0_debugbus_blocks);
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debugbus_blocks_count = ARRAY_SIZE(gen7_2_0_debugbus_blocks);
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gbif_debugbus_blocks = a7xx_gbif_debugbus_blocks;
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gbif_debugbus_blocks_count = ARRAY_SIZE(a7xx_gbif_debugbus_blocks);
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} else {
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BUG_ON(!adreno_is_a750(adreno_gpu));
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debugbus_blocks = gen7_9_0_debugbus_blocks;
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debugbus_blocks_count = ARRAY_SIZE(gen7_9_0_debugbus_blocks);
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gbif_debugbus_blocks = gen7_9_0_gbif_debugbus_blocks;
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gbif_debugbus_blocks_count = ARRAY_SIZE(gen7_9_0_gbif_debugbus_blocks);
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}
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}
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total_debugbus_blocks = debugbus_blocks_count +
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total_debugbus_blocks = debugbus_blocks_count + gbif_debugbus_blocks_count;
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ARRAY_SIZE(a7xx_gbif_debugbus_blocks);
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a6xx_state->debugbus = state_kcalloc(a6xx_state, total_debugbus_blocks,
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a6xx_state->debugbus = state_kcalloc(a6xx_state, total_debugbus_blocks,
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sizeof(*a6xx_state->debugbus));
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sizeof(*a6xx_state->debugbus));
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@ -410,9 +420,9 @@ static void a7xx_get_debugbus_blocks(struct msm_gpu *gpu,
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&a6xx_state->debugbus[i]);
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&a6xx_state->debugbus[i]);
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}
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}
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for (i = 0; i < ARRAY_SIZE(a7xx_gbif_debugbus_blocks); i++) {
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for (i = 0; i < gbif_debugbus_blocks_count; i++) {
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a6xx_get_debugbus_block(gpu,
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a6xx_get_debugbus_block(gpu,
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a6xx_state, &a7xx_debugbus_blocks[a7xx_gbif_debugbus_blocks[i]],
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a6xx_state, &a7xx_debugbus_blocks[gbif_debugbus_blocks[i]],
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&a6xx_state->debugbus[i + debugbus_blocks_count]);
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&a6xx_state->debugbus[i + debugbus_blocks_count]);
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}
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}
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}
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}
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@ -813,10 +823,13 @@ static void a7xx_get_clusters(struct msm_gpu *gpu,
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if (adreno_is_a730(adreno_gpu)) {
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if (adreno_is_a730(adreno_gpu)) {
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clusters = gen7_0_0_clusters;
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clusters = gen7_0_0_clusters;
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clusters_size = ARRAY_SIZE(gen7_0_0_clusters);
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clusters_size = ARRAY_SIZE(gen7_0_0_clusters);
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} else {
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} else if (adreno_is_a740_family(adreno_gpu)) {
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BUG_ON(!adreno_is_a740_family(adreno_gpu));
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clusters = gen7_2_0_clusters;
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clusters = gen7_2_0_clusters;
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clusters_size = ARRAY_SIZE(gen7_2_0_clusters);
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clusters_size = ARRAY_SIZE(gen7_2_0_clusters);
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} else {
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BUG_ON(!adreno_is_a750(adreno_gpu));
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clusters = gen7_9_0_clusters;
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clusters_size = ARRAY_SIZE(gen7_9_0_clusters);
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}
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}
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a6xx_state->clusters = state_kcalloc(a6xx_state,
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a6xx_state->clusters = state_kcalloc(a6xx_state,
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@ -948,10 +961,13 @@ static void a7xx_get_shaders(struct msm_gpu *gpu,
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if (adreno_is_a730(adreno_gpu)) {
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if (adreno_is_a730(adreno_gpu)) {
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shader_blocks = gen7_0_0_shader_blocks;
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shader_blocks = gen7_0_0_shader_blocks;
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num_shader_blocks = ARRAY_SIZE(gen7_0_0_shader_blocks);
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num_shader_blocks = ARRAY_SIZE(gen7_0_0_shader_blocks);
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} else {
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} else if (adreno_is_a740_family(adreno_gpu)) {
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BUG_ON(!adreno_is_a740_family(adreno_gpu));
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shader_blocks = gen7_2_0_shader_blocks;
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shader_blocks = gen7_2_0_shader_blocks;
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num_shader_blocks = ARRAY_SIZE(gen7_2_0_shader_blocks);
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num_shader_blocks = ARRAY_SIZE(gen7_2_0_shader_blocks);
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} else {
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BUG_ON(!adreno_is_a750(adreno_gpu));
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shader_blocks = gen7_9_0_shader_blocks;
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num_shader_blocks = ARRAY_SIZE(gen7_9_0_shader_blocks);
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}
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}
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a6xx_state->shaders = state_kcalloc(a6xx_state,
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a6xx_state->shaders = state_kcalloc(a6xx_state,
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@ -1337,10 +1353,13 @@ static void a7xx_get_registers(struct msm_gpu *gpu,
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if (adreno_is_a730(adreno_gpu)) {
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if (adreno_is_a730(adreno_gpu)) {
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reglist = gen7_0_0_reg_list;
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reglist = gen7_0_0_reg_list;
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pre_crashdumper_regs = gen7_0_0_pre_crashdumper_gpu_registers;
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pre_crashdumper_regs = gen7_0_0_pre_crashdumper_gpu_registers;
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} else {
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} else if (adreno_is_a740_family(adreno_gpu)) {
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BUG_ON(!adreno_is_a740_family(adreno_gpu));
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reglist = gen7_2_0_reg_list;
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reglist = gen7_2_0_reg_list;
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pre_crashdumper_regs = gen7_0_0_pre_crashdumper_gpu_registers;
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pre_crashdumper_regs = gen7_0_0_pre_crashdumper_gpu_registers;
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} else {
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BUG_ON(!adreno_is_a750(adreno_gpu));
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reglist = gen7_9_0_reg_list;
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pre_crashdumper_regs = gen7_9_0_pre_crashdumper_gpu_registers;
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}
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}
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count = A7XX_PRE_CRASHDUMPER_SIZE + A7XX_POST_CRASHDUMPER_SIZE;
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count = A7XX_PRE_CRASHDUMPER_SIZE + A7XX_POST_CRASHDUMPER_SIZE;
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@ -1388,7 +1407,8 @@ static void a7xx_get_post_crashdumper_registers(struct msm_gpu *gpu,
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struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);
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struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);
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const u32 *regs;
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const u32 *regs;
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BUG_ON(!(adreno_is_a730(adreno_gpu) || adreno_is_a740_family(adreno_gpu)));
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BUG_ON(!(adreno_is_a730(adreno_gpu) || adreno_is_a740_family(adreno_gpu) ||
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adreno_is_a750(adreno_gpu)));
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regs = gen7_0_0_post_crashdumper_registers;
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regs = gen7_0_0_post_crashdumper_registers;
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a7xx_get_ahb_gpu_registers(gpu,
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a7xx_get_ahb_gpu_registers(gpu,
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struct a6xx_gpu_state *a6xx_state)
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struct a6xx_gpu_state *a6xx_state)
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{
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{
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struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);
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struct adreno_gpu *adreno_gpu = to_adreno_gpu(gpu);
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const struct a6xx_indexed_registers *indexed_regs;
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int i, indexed_count, mempool_count;
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int i, indexed_count, mempool_count;
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BUG_ON(!(adreno_is_a730(adreno_gpu) || adreno_is_a740_family(adreno_gpu)));
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if (adreno_is_a730(adreno_gpu) || adreno_is_a740_family(adreno_gpu)) {
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indexed_count = ARRAY_SIZE(a7xx_indexed_reglist);
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indexed_regs = a7xx_indexed_reglist;
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indexed_count = ARRAY_SIZE(a7xx_indexed_reglist);
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} else {
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BUG_ON(!adreno_is_a750(adreno_gpu));
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indexed_regs = gen7_9_0_cp_indexed_reg_list;
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indexed_count = ARRAY_SIZE(gen7_9_0_cp_indexed_reg_list);
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}
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mempool_count = ARRAY_SIZE(a7xx_cp_bv_mempool_indexed);
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mempool_count = ARRAY_SIZE(a7xx_cp_bv_mempool_indexed);
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a6xx_state->indexed_regs = state_kcalloc(a6xx_state,
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a6xx_state->indexed_regs = state_kcalloc(a6xx_state,
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/* First read the common regs */
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/* First read the common regs */
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for (i = 0; i < indexed_count; i++)
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for (i = 0; i < indexed_count; i++)
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a6xx_get_indexed_regs(gpu, a6xx_state, &a7xx_indexed_reglist[i],
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a6xx_get_indexed_regs(gpu, a6xx_state, &indexed_regs[i],
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&a6xx_state->indexed_regs[i]);
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&a6xx_state->indexed_regs[i]);
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gpu_rmw(gpu, REG_A6XX_CP_CHICKEN_DBG, 0, BIT(2));
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gpu_rmw(gpu, REG_A6XX_CP_CHICKEN_DBG, 0, BIT(2));
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