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riscv: Add support for memtest

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The riscv [rv32_]defconfig enabled CONFIG_MEMTEST,
but memtest feature is not supported in RISCV.

Add early_memtest() to support for memtest.

Signed-off-by: Kefeng Wang <wangkefeng.wang@huawei.com>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
This commit is contained in:
Kefeng Wang 2021-02-25 14:54:17 +08:00 • committed by Palmer Dabbelt
parent a38fd87484
commit f6e5aedf47
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GPG key ID: 2E1319F35FBB1889
2 changed files with 5 additions and 3 deletions
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2
Documentation/admin-guide/kernel-parameters.txt
View file

@ -2794,7 +2794,7 @@
seconds. Use this parameter to check at some seconds. Use this parameter to check at some
other rate. 0 disables periodic checking. other rate. 0 disables periodic checking.
memtest= [KNL,X86,ARM,PPC] Enable memtest memtest= [KNL,X86,ARM,PPC,RISCV] Enable memtest
Format: <integer> Format: <integer>
default : 0 <disable> default : 0 <disable>
Specifies the number of memtest passes to be Specifies the number of memtest passes to be

6
arch/riscv/mm/init.c
View file

@ -128,8 +128,9 @@ void __init setup_bootmem(void)
if (max_mapped_addr == (dram_end - 1)) if (max_mapped_addr == (dram_end - 1))
memblock_set_current_limit(max_mapped_addr - 4096); memblock_set_current_limit(max_mapped_addr - 4096);
max_pfn = PFN_DOWN(dram_end); min_low_pfn = PFN_UP(memblock_start_of_DRAM());
max_low_pfn = max_pfn; max_low_pfn = max_pfn = PFN_DOWN(dram_end);
dma32_phys_limit = min(4UL * SZ_1G, (unsigned long)PFN_PHYS(max_low_pfn)); dma32_phys_limit = min(4UL * SZ_1G, (unsigned long)PFN_PHYS(max_low_pfn));
set_max_mapnr(max_low_pfn - ARCH_PFN_OFFSET); set_max_mapnr(max_low_pfn - ARCH_PFN_OFFSET);
@ -593,6 +594,7 @@ void __init paging_init(void)
void __init misc_mem_init(void) void __init misc_mem_init(void)
{ {
early_memtest(min_low_pfn << PAGE_SHIFT, max_low_pfn << PAGE_SHIFT);
arch_numa_init(); arch_numa_init();
sparse_init(); sparse_init();
zone_sizes_init(); zone_sizes_init();