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This pull request contains Broadcom ARM-based SoCs Kconfig/machine entry

Browse source 
changes for 5.12, please pull the following:
 
 - Maxime adds a select of the Broadcom STB standard L2 interrupt
   controller driver which is used in the Raspberry Pi 4 HDMI controller to
   support I2C and CEC interrupts
 
 - Florian adds a debug URT entry for the 72116 STB SoC
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Merge tag 'arm-soc/for-5.12/soc' of https://github.com/Broadcom/stblinux into arm/soc

This pull request contains Broadcom ARM-based SoCs Kconfig/machine entry
changes for 5.12, please pull the following:

- Maxime adds a select of the Broadcom STB standard L2 interrupt
  controller driver which is used in the Raspberry Pi 4 HDMI controller to
  support I2C and CEC interrupts

- Florian adds a debug URT entry for the 72116 STB SoC

* tag 'arm-soc/for-5.12/soc' of https://github.com/Broadcom/stblinux:
  ARM: bcm: Select BRCMSTB_L2_IRQ for bcm2835
  ARM: brcmstb: Add debug UART entry for 72116

Link: https://lore.kernel.org/r/20210131221721.685974-6-f.fainelli@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2021-02-02 22:30:34 +01:00
commit f79bf56fb2
3 changed files with 18 additions and 14 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

30
arch/arm/include/debug/brcmstb.S
View file

@ -25,6 +25,7 @@
#define SUN_TOP_CTRL_BASE_V7 REG_PHYS_ADDR_V7(0x404000) #define SUN_TOP_CTRL_BASE_V7 REG_PHYS_ADDR_V7(0x404000)
#define UARTA_3390 REG_PHYS_ADDR(0x40a900) #define UARTA_3390 REG_PHYS_ADDR(0x40a900)
#define UARTA_72116 UARTA_7255
#define UARTA_7250 REG_PHYS_ADDR(0x40b400) #define UARTA_7250 REG_PHYS_ADDR(0x40b400)
#define UARTA_7255 REG_PHYS_ADDR(0x40c000) #define UARTA_7255 REG_PHYS_ADDR(0x40c000)
#define UARTA_7260 UARTA_7255 #define UARTA_7260 UARTA_7255
@ -85,20 +86,21 @@ ARM_BE8( rev \rv, \rv )
/* Chip specific detection starts here */ /* Chip specific detection starts here */
20: checkuart(\rp, \rv, 0x33900000, 3390) 20: checkuart(\rp, \rv, 0x33900000, 3390)
21: checkuart(\rp, \rv, 0x72160000, 7216) 21: checkuart(\rp, \rv, 0x07211600, 72116)
22: checkuart(\rp, \rv, 0x07216400, 72164) 22: checkuart(\rp, \rv, 0x72160000, 7216)
23: checkuart(\rp, \rv, 0x07216500, 72165) 23: checkuart(\rp, \rv, 0x07216400, 72164)
24: checkuart(\rp, \rv, 0x72500000, 7250) 24: checkuart(\rp, \rv, 0x07216500, 72165)
25: checkuart(\rp, \rv, 0x72550000, 7255) 25: checkuart(\rp, \rv, 0x72500000, 7250)
26: checkuart(\rp, \rv, 0x72600000, 7260) 26: checkuart(\rp, \rv, 0x72550000, 7255)
27: checkuart(\rp, \rv, 0x72680000, 7268) 27: checkuart(\rp, \rv, 0x72600000, 7260)
28: checkuart(\rp, \rv, 0x72710000, 7271) 28: checkuart(\rp, \rv, 0x72680000, 7268)
29: checkuart(\rp, \rv, 0x72780000, 7278) 29: checkuart(\rp, \rv, 0x72710000, 7271)
30: checkuart(\rp, \rv, 0x73640000, 7364) 30: checkuart(\rp, \rv, 0x72780000, 7278)
31: checkuart(\rp, \rv, 0x73660000, 7366) 31: checkuart(\rp, \rv, 0x73640000, 7364)
32: checkuart(\rp, \rv, 0x07437100, 74371) 32: checkuart(\rp, \rv, 0x73660000, 7366)
33: checkuart(\rp, \rv, 0x74390000, 7439) 33: checkuart(\rp, \rv, 0x07437100, 74371)
34: checkuart(\rp, \rv, 0x74450000, 7445) 34: checkuart(\rp, \rv, 0x74390000, 7439)
35: checkuart(\rp, \rv, 0x74450000, 7445)
/* No valid UART found */ /* No valid UART found */
90: mov \rp, #0 90: mov \rp, #0

1
arch/arm/mach-bcm/Kconfig
View file

@ -161,6 +161,7 @@ config ARCH_BCM2835
select ARM_TIMER_SP804 select ARM_TIMER_SP804
select HAVE_ARM_ARCH_TIMER if ARCH_MULTI_V7 select HAVE_ARM_ARCH_TIMER if ARCH_MULTI_V7
select BCM2835_TIMER select BCM2835_TIMER
select BRCMSTB_L2_IRQ
select PINCTRL select PINCTRL
select PINCTRL_BCM2835 select PINCTRL_BCM2835
select MFD_CORE select MFD_CORE

1
arch/arm64/Kconfig.platforms
View file

@ -39,6 +39,7 @@ config ARCH_BCM2835
select ARM_AMBA select ARM_AMBA
select ARM_GIC select ARM_GIC
select ARM_TIMER_SP804 select ARM_TIMER_SP804
select BRCMSTB_L2_IRQ
help help
This enables support for the Broadcom BCM2837 and BCM2711 SoC. This enables support for the Broadcom BCM2837 and BCM2711 SoC.
These SoCs are used in the Raspberry Pi 3 and 4 devices. These SoCs are used in the Raspberry Pi 3 and 4 devices.