net/mlx5: Change IRQ storage logic from static to dynamic
Store newly created IRQs in the xarray DB instead of a static array, so we will be able to store only IRQs which are being used. Signed-off-by: Shay Drory <shayd@nvidia.com> Reviewed-by: Leon Romanovsky <leonro@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
This commit is contained in:
Shay Drory
Saeed Mahameed
parent
2d74524c01
commit
fc63dd2a85
3 changed files with 58 additions and 36 deletions
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@ -892,10 +892,16 @@ EXPORT_SYMBOL(mlx5_comp_vectors_count);
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struct cpumask *
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mlx5_comp_irq_get_affinity_mask(struct mlx5_core_dev *dev, int vector)
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{
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int vecidx = vector + MLX5_IRQ_VEC_COMP_BASE;
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struct mlx5_eq_table *table = dev->priv.eq_table;
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struct mlx5_eq_comp *eq, *n;
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int i = 0;
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return mlx5_irq_get_affinity_mask(dev->priv.eq_table->irq_table,
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vecidx);
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list_for_each_entry_safe(eq, n, &table->comp_eqs_list, list) {
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if (i++ == vector)
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break;
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}
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return mlx5_irq_get_affinity_mask(eq->core.irq);
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}
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EXPORT_SYMBOL(mlx5_comp_irq_get_affinity_mask);
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@ -24,7 +24,6 @@ struct mlx5_irq *mlx5_irq_request(struct mlx5_core_dev *dev, int vecidx,
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void mlx5_irq_release(struct mlx5_irq *irq);
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int mlx5_irq_attach_nb(struct mlx5_irq *irq, struct notifier_block *nb);
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int mlx5_irq_detach_nb(struct mlx5_irq *irq, struct notifier_block *nb);
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struct cpumask *
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mlx5_irq_get_affinity_mask(struct mlx5_irq_table *irq_table, int vecidx);
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struct cpumask *mlx5_irq_get_affinity_mask(struct mlx5_irq *irq);
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#endif /* __MLX5_IRQ_H__ */
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@ -14,15 +14,17 @@
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#define MLX5_MAX_IRQ_NAME (32)
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struct mlx5_irq {
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u32 index;
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struct atomic_notifier_head nh;
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cpumask_var_t mask;
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char name[MLX5_MAX_IRQ_NAME];
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struct kref kref;
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int irqn;
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struct mlx5_irq_table *table;
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};
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struct mlx5_irq_table {
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struct mlx5_irq *irq;
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struct xarray irqs;
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int nvec;
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};
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@ -54,13 +56,6 @@ int mlx5_irq_get_num_comp(struct mlx5_irq_table *table)
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return table->nvec - MLX5_IRQ_VEC_COMP_BASE;
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}
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static struct mlx5_irq *mlx5_irq_get(struct mlx5_core_dev *dev, int vecidx)
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{
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struct mlx5_irq_table *irq_table = mlx5_irq_table_get(dev);
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return &irq_table->irq[vecidx];
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}
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/**
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* mlx5_get_default_msix_vec_count - Get the default number of MSI-X vectors
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* to be ssigned to each VF.
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@ -149,7 +144,9 @@ out:
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static void irq_release(struct kref *kref)
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{
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struct mlx5_irq *irq = container_of(kref, struct mlx5_irq, kref);
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struct mlx5_irq_table *table = irq->table;
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xa_erase(&table->irqs, irq->index);
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/* free_irq requires that affinity and rmap will be cleared
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* before calling it. This is why there is asymmetry with set_rmap
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* which should be called after alloc_irq but before request_irq.
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@ -157,6 +154,7 @@ static void irq_release(struct kref *kref)
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irq_set_affinity_hint(irq->irqn, NULL);
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free_cpumask_var(irq->mask);
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free_irq(irq->irqn, &irq->nh);
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kfree(irq);
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}
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static void irq_put(struct mlx5_irq *irq)
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@ -203,13 +201,17 @@ static void irq_set_name(char *name, int vecidx)
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vecidx - MLX5_IRQ_VEC_COMP_BASE);
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}
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static int irq_request(struct mlx5_core_dev *dev, int i)
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static struct mlx5_irq *irq_request(struct mlx5_core_dev *dev, int i)
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{
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struct mlx5_irq_table *table = mlx5_irq_table_get(dev);
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char name[MLX5_MAX_IRQ_NAME];
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struct xa_limit xa_num_irqs;
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struct mlx5_irq *irq;
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int err;
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irq = mlx5_irq_get(dev, i);
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irq = kzalloc(sizeof(*irq), GFP_KERNEL);
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if (!irq)
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return ERR_PTR(-ENOMEM);
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irq->irqn = pci_irq_vector(dev->pdev, i);
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irq_set_name(name, i);
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ATOMIC_INIT_NOTIFIER_HEAD(&irq->nh);
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@ -226,15 +228,25 @@ static int irq_request(struct mlx5_core_dev *dev, int i)
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err = -ENOMEM;
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goto err_cpumask;
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}
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xa_num_irqs.min = 0;
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xa_num_irqs.max = table->nvec;
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err = xa_alloc(&table->irqs, &irq->index, irq, xa_num_irqs,
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GFP_KERNEL);
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if (err) {
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mlx5_core_err(dev, "Failed to alloc xa entry for irq(%u). err = %d\n",
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irq->index, err);
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goto err_xa;
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}
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irq->table = table;
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kref_init(&irq->kref);
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return 0;
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return irq;
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err_xa:
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free_cpumask_var(irq->mask);
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err_cpumask:
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free_irq(irq->irqn, &irq->nh);
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err_req_irq:
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if (i != 0)
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irq_set_affinity_notifier(irq->irqn, NULL);
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return err;
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kfree(irq);
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return ERR_PTR(err);
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}
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/**
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@ -259,25 +271,25 @@ void mlx5_irq_release(struct mlx5_irq *irq)
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struct mlx5_irq *mlx5_irq_request(struct mlx5_core_dev *dev, int vecidx,
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struct cpumask *affinity)
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{
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struct mlx5_irq_table *table = mlx5_irq_table_get(dev);
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struct mlx5_irq *irq = &table->irq[vecidx];
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int ret;
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struct mlx5_irq_table *irq_table = mlx5_irq_table_get(dev);
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struct mlx5_irq *irq;
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ret = kref_get_unless_zero(&irq->kref);
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if (ret)
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irq = xa_load(&irq_table->irqs, vecidx);
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if (irq) {
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kref_get(&irq->kref);
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return irq;
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}
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irq = irq_request(dev, vecidx);
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if (IS_ERR(irq))
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return irq;
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ret = irq_request(dev, vecidx);
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if (ret)
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return ERR_PTR(ret);
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cpumask_copy(irq->mask, affinity);
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irq_set_affinity_hint(irq->irqn, irq->mask);
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return irq;
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}
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struct cpumask *
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mlx5_irq_get_affinity_mask(struct mlx5_irq_table *irq_table, int vecidx)
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struct cpumask *mlx5_irq_get_affinity_mask(struct mlx5_irq *irq)
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{
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return irq_table->irq[vecidx].mask;
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return irq->mask;
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}
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int mlx5_irq_table_create(struct mlx5_core_dev *dev)
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@ -299,9 +311,7 @@ int mlx5_irq_table_create(struct mlx5_core_dev *dev)
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if (nvec <= MLX5_IRQ_VEC_COMP_BASE)
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return -ENOMEM;
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table->irq = kcalloc(nvec, sizeof(*table->irq), GFP_KERNEL);
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if (!table->irq)
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return -ENOMEM;
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xa_init_flags(&table->irqs, XA_FLAGS_ALLOC);
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nvec = pci_alloc_irq_vectors(dev->pdev, MLX5_IRQ_VEC_COMP_BASE + 1,
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nvec, PCI_IRQ_MSIX);
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@ -315,19 +325,26 @@ int mlx5_irq_table_create(struct mlx5_core_dev *dev)
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return 0;
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err_free_irq:
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kfree(table->irq);
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xa_destroy(&table->irqs);
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return err;
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}
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void mlx5_irq_table_destroy(struct mlx5_core_dev *dev)
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{
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struct mlx5_irq_table *table = dev->priv.irq_table;
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struct mlx5_irq *irq;
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unsigned long index;
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if (mlx5_core_is_sf(dev))
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return;
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/* There are cases where IRQs still will be in used when we reaching
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* to here. Hence, making sure all the irqs are realeased.
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*/
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xa_for_each(&table->irqs, index, irq)
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irq_release(&irq->kref);
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pci_free_irq_vectors(dev->pdev);
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kfree(table->irq);
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xa_destroy(&table->irqs);
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}
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struct mlx5_irq_table *mlx5_irq_table_get(struct mlx5_core_dev *dev)
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