drm/amd/display: Use channel_width = 2 for vram table 3.0
VBIOS has suggested to use channel_width=2 for any ASIC that uses vram info 3.0. This is because channel_width in the vram table no longer represents the memory width Tested-by: Daniel Wheeler <daniel.wheeler@amd.com> Reviewed-by: Samson Tam <samson.tam@amd.com> Acked-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com> Signed-off-by: Alvin Lee <alvin.lee2@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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1 changed files with 7 additions and 1 deletions
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@ -2386,7 +2386,13 @@ static enum bp_result get_vram_info_v30(
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return BP_RESULT_BADBIOSTABLE;
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return BP_RESULT_BADBIOSTABLE;
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info->num_chans = info_v30->channel_num;
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info->num_chans = info_v30->channel_num;
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info->dram_channel_width_bytes = (1 << info_v30->channel_width) / 8;
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/* As suggested by VBIOS we should always use
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* dram_channel_width_bytes = 2 when using VRAM
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* table version 3.0. This is because the channel_width
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* param in the VRAM info table is changed in 7000 series and
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* no longer represents the memory channel width.
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*/
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info->dram_channel_width_bytes = 2;
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return result;
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return result;
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}
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}
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