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608 commits

Author SHA1 Message Date
Kenneth Feng
f88fe20372 drm/amd/pm: add SCPM support in smu v13_0_7
port the SCPM change from smu_v13_0_0 to smu_v13_0_7

Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05 16:53:28 -04:00
Kenneth Feng
bae456dd18 drm/amd/pm: enable platform features for smu_v13_0_7
enable throttler, AC/DC, VR hot, FW CTF, fan control for smu_v13_0_7

Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Wang Yang <kevinyang.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05 16:53:26 -04:00
Kenneth Feng
37d0fd44cc drm/amd/pm: enable fclk,vcn ds and df cstate for smu_v13_0_7
enable fclk ds, vcn ds and df cstate for smu_v13_0_7

Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05 16:53:24 -04:00
Kenneth Feng
7ab0cd71d7 drm/amd/pm: enable mp0,vcn,dcn dpm on smu_v13_0_7
enable mp0 dpm, vcn dpm, dcn dpm on smu_v13_0_7

Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Jack Gui <Jack.Gui@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05 16:53:22 -04:00
Kenneth Feng
bae3fcdeff drm/amd/pm: enable link dpm and link ds on smu_v13_0_7
enable link clock dpm and link clock deep sleep on smu_v13_0_7

Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Jack Gui <Jack.Gui@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05 16:53:20 -04:00
Kenneth Feng
a3b49ee0c3 drm/amd/pm: add mvdd and vddio scaling in smu_v13_0_7
add mvdd and vddio scaling in smu_v13_0_7 to follow uclk dpm

Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05 16:53:17 -04:00
Kenneth Feng
712b91827d drm/amd/pm: add features to smu_v13_0_7
add prefetcher, socclk dpm, fclk dpm, uclk dpm to
smu_v13_0_7

Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05 16:53:14 -04:00
Kenneth Feng
44426f6cfa drm/amd/pm: support power on/off vcn/jpeg in smu v13_0_7
add power on/off vcn&jpeg callbacks in smu_v13_0_7

Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05 16:53:12 -04:00
Likun Gao
061ca5f52a drm/amd/pm: add get enable mask function for smu v13_0_7
Add get_enabled_mask interface for smu v13_0_7.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05 16:53:10 -04:00
Chengming Gui
113cc31dde drm/amd/pm: add SMU_13_0_7 ppt_funcs for SMU_13_0_7
Add initial support for SMU 13.0.7.

V2: unify ppt name, fix copyright format, add missing break (Kenneth/Evan)
V3: Split PMFW headers as separate patch (Alex)

Signed-off-by: Chengming Gui <Jack.Gui@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05 16:53:07 -04:00
Chengming Gui
0c2a2d1c81 drm/amdgpu/swsmu: add smu 13.0.7 firmware
Declare smu 13.0.7 firmware.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Chengming Gui <Jack.Gui@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05 16:53:05 -04:00
Chengming Gui
bb4a9c15b2 drm/amd/pm: add SMU_13_0_7 PMFW headers
Add driver_if/ppsmc/pptable head files.

Signed-off-by: Chengming Gui <Jack.Gui@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05 16:53:03 -04:00
Evan Quan
ea26ad7f0f drm/amd/pm: enable more dpm features to pair with PMFW 78.31.0
Enables the support for DCN DPM and DCFCLK DS features.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05 16:51:08 -04:00
Evan Quan
914b30874c drm/amd/pm: enable gfx ulv feature control for SMU 13.0.0
Fulfill the interface for gfx ulv control.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05 16:51:06 -04:00
Evan Quan
a5ffbfa090 drm/amd/pm: enable deep sleep features control for SMU 13.0.0
Fulfill the interface for deep sleep features control.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05 16:51:04 -04:00
Evan Quan
9f3f1b03fa drm/amd/pm: support more DPM features for SMU 13.0.0
To pair with 78.30.0 PMFW, support more dpm features:
  - UCLK DPM (disabled temporarily)
  - VMEMP Scaling (disabled temporarily)
  - VDDIO Scaling (disabled temporarily)
  - GFXCLK DS
  - SOCCLK DS
  - MPCLK Deep Sleep on VDD_SOC
  - MPCLK Deep Sleep on VDD_BACO
  - Memory Temperature Reading (disabled temporarily)

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05 16:51:01 -04:00
Evan Quan
04491df502 drm/amd/pm: enable df cstate feature for SMU 13.0.0
As the feature is ready with 78.29.0 PMFW.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05 16:50:56 -04:00
Evan Quan
bb70ac580c drm/amd/pm: enable PMLOG support for SMU 13.0.0
Fulfill the interface for setting PMLOG DramAddr
on SMU 13.0.0.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05 16:50:54 -04:00
Evan Quan
08960aca88 drm/amd/pm: enable ppfeature mask setting for SMU 13.0.0
Fulfill the interfaces for retrieving and setting ppfeature
masks on SMU 13.0.0.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05 16:50:51 -04:00
Evan Quan
93661c1d6c drm/amd/pm: enable RunDcBtc support for SMU 13.0.0
Fulfill the RunDcBtc for SMU 13.0.0.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05 16:50:47 -04:00
Evan Quan
619b15a255 drm/amd/pm: enable power profile setting for SMU 13.0.0
Fulfill the interfaces for retrieving and setting power profile
mode on SMU 13.0.0.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05 16:50:43 -04:00
Evan Quan
b538995d8d drm/amd/pm: enable ac/dc switching for SMU 13.0.0
Fulfill the ->set_power_source interface which notifies
PMFW the current system power source(AC/DC).

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05 16:50:28 -04:00
Evan Quan
fcd1ac96cc drm/amd/pm: enable power limit retrieving and setting for SMU 13.0.0
Fulfill the interfaces for retrieving and setting power limit on
SMU 13.0.0.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-05 16:50:25 -04:00
Evan Quan
276c03a054 drm/amd/smu: Update SMU13 support for SMU 13.0.0
Modify the common smu13 code and add a new smu
13.0.0 ppt file to handle the smu 13.0.0 specific
configuration.

v2: squash in typo fix in profile name

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04 09:58:46 -04:00
Likun Gao
ce81151c7d drm/amd/smu: add smu v13_0 header files
Add driver_if ppsmc and pptable header files
for smu v13_0_0

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04 09:58:40 -04:00
Evan Quan
6a2d7a229e drm/amd/pm: enable the support for retrieving combo pptable
We need to relay on this way to get the raw PPTable when
SCPM feature is enabled.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04 09:58:33 -04:00
Evan Quan
d51e577c7d drm/amd/pm: correct SMU OverridePcieParameters related settings
Correct the hw initialization sequence.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04 09:58:14 -04:00
Evan Quan
9b5f9891c4 drm/amd/pm: enable SCPM support for SMU
With SCPM enabled, the pptable used will be signed. It cannot
be used directly by driver. To get the raw pptable, we need to
rely on the combo pptable(and its revelant SMU message).

Also, the pptable transferring(to SMU) will be performed by PSP.
Some SMU messages will be not available to driver any more.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04 09:58:07 -04:00
Evan Quan
b37c41f2cb drm/amdgpu: enable pptable ucode loading
With SCPM enabled, pptable cannot be uploaded to SMU directly.
The transferring has to be via PSP.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04 09:58:00 -04:00
Evan Quan
288908edce drm/amd/pm: update the hw initialization sequence around pptable setup
Place pptable setup after smu_set_driver_table_location. As under SCPM
enabled scenario, the latter one is a prerequisite for the former one.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04 09:57:58 -04:00
Evan Quan
593a54f180 drm/amd/pm: correct the way for retrieving bootup clocks
The bootup clocks can be retrieved from the smu_info table. That
is light-weight compared with existing way.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04 09:57:53 -04:00
Evan Quan
a1c30111de drm/amd/pm: move bootup values retrieving to ->sw_init
Firsrt of all, the operations involved is to interact with
VBIOS. They are fully supported at ->sw_init phase.

Secondly, the new mechanism to upload pptable to SMU is
introduced. With the new mechanism, the pptable transferring
has to be via PSP. That requires the pptable ucode(and necessary
bootupp values retrieving) must be ready before ->hw_init phase of PSP.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04 09:57:45 -04:00
Likun Gao
6f3c9dbb65 drm/amd/pm: fix NULL pointer issue of amdgpu_smu_stb_debug_fs_init
Fix NULL pointer issue on amdgpu_smu_stb_debug_fs_init if SMU block not
enabled.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04 09:57:42 -04:00
Elena Sakhnovitch
57301181a5 drm/amd/pm: Disable fan control if not supported
On Sienna Cichild, not all platforms use PMFW based fan control
(ex: fanless systems). On such ASICs fan control by PMFW will be
disabled in PPTable. Disable hwmon knobs for fan control also as
it is not possible to report or control fan speed on such platforms
through driver.

v3: FeaturesToRun casted as uint64_t

Signed-off-by: Elena Sakhnovitch  <elena.sakhnovitch@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04 09:54:50 -04:00
Elena Sakhnovitch
20f5e6cf3b drm/amdgpu: Remove trailing space
Clean up trailing space in file sienna_cichlid_ppt.c.

Signed-off-by: Elena Sakhnovitch <elena.sakhnovitch@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04 09:54:11 -04:00
Likun Gao
2913b567ce drm/amd/smu: Increace dpm level count only for smu v13.0.2
Only V13.0.2 on SMU v13 will get 0 based max level from fw and
increment by one, other ASIC will not need for this.
V2: replace the asic_type check with ip versioning check.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-05-04 09:53:02 -04:00
Darren Powell
f24044bd9b amdgpu/pm: Clarify documentation of error handling in send_smc_mesg
Clarify the smu_cmn_send_smc_msg_with_param documentation to mention two
cases exist where messages are silently dropped with no error returned.
These cases occur in unusual situations where either:
 1. the message type is not allowed to a virtual GPU, or
 2. a PCI recovery is underway and the HW is not yet in sync with the SW

For more details see
 commit 4ea5081c82 ("drm/amd/powerplay: enable SMC message filter")
 commit bf36b52e78 ("drm/amdgpu: Avoid accessing HW when suspending SW state")

(v2)
  Reworked with suggestions from Luben & Paul

(v3)
  Updated wording as per Luben's feedback
  Corrected error stating all messages denied on virtual GPU
  (each GPU has mask of which messages are allowed)

Signed-off-by: Darren Powell <darren.powell@amd.com>
Reviewed-by: Luben Tuikov <luben.tuikov@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-04-19 13:58:32 -04:00
Kent Russell
5e9c445172 drm/amdgpu: Fix unique_id references for Sienna Cichlid
Since unique_id is only supported in PMFW 0x3A5300 and higher, we will
only be able to use it inside Smu_Metrics_V3_t, which requires PMFW
0x3A4900 and higher. Remove the unique_id/serial_number references from
the v1 and v2 tables to avoid any confusion, and return 0 if metrics_v1
or metrics_v2 are used to try to get the unique_id/serial_number.

Signed-off-by: Kent Russell <kent.russell@amd.com>
Reviewed-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-03-31 23:05:54 -04:00
Kent Russell
ebd9c071d2 drm/amdgpu: Add unique_id support for sienna cichlid
This is being added to SMU Metrics, so add the required tie-ins in the
kernel. Also create the corresponding unique_id sysfs file.

v2: Add FW version check, remove SMU mutex
v3: Fix style warning
v4: Add MP1 IP_VERSION check to FW version check

Signed-off-by: Kent Russell <kent.russell@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-03-31 23:05:54 -04:00
Kent Russell
4a93d938a4 drm/amdgpu: Use metrics data function to get unique_id for Aldebaran
This is abstracted well enough in the get_metrics_data function, so use
the function

Signed-off-by: Kent Russell <kent.russell@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-03-31 23:05:54 -04:00
Kent Russell
6e5d64e3ea drm/amdgpu: Add UNIQUE_ID to MetricsMember_t
This will allow us to use the generic *_get_metrics_data functions for
ASICs that support unique_id

Signed-off-by: Kent Russell <kent.russell@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-03-31 23:05:54 -04:00
Yifan Zhang
60d61f4ed6 drm/amdgpu/pm: fix the Stable pstate Test in amdgpu_test
If GFX DPM is disbaled, Stable pstate Test in amdgpu_test fails.
Check GFX DPM statue before change clock level

Log:
[   46.595274] [drm] Initialized amdgpu 3.46.0 20150101 for 0000:02:00.0 on minor 0
[   46.599929] fbcon: amdgpudrmfb (fb0) is primary device
[   46.785753] Console: switching to colour frame buffer device 240x67
[   46.811765] amdgpu 0000:02:00.0: [drm] fb0: amdgpudrmfb frame buffer device
[  131.398407] amdgpu 0000:02:00.0: amdgpu: Failed to set performance level!

Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com>
Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-03-25 12:40:24 -04:00
Dan Carpenter
508a47d434 drm/amd/pm: fix indenting in __smu_cmn_reg_print_error()
Smatch complains that the dev_err_ratelimited() is indented one tab more
than the surrounding lines.

	drivers/gpu/drm/amd/amdgpu/../pm/swsmu/smu_cmn.c:174
	__smu_cmn_reg_print_error() warn: inconsistent indenting

It looks like it's not a bug, just that the indenting needs to be cleaned
up.

Reviewed-by: Luben Tuikov <luben.tuikov@amd.com>
Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-03-15 15:01:12 -04:00
Lijo Lazar
8718ca1dbf drm/amd/pm: Send message when resp status is 0xFC
When PMFW is really busy, it will respond with 0xFC. However, it doesn't
change the response register state when it becomes free. Driver should
retry and proceed to send message if the response status is 0xFC.

Signed-off-by: Lijo Lazar <lijo.lazar@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-03-15 14:25:16 -04:00
Stanley.Yang
d510eccfa5 drm/amd/pm: add send bad channel info function
support message SMU update bad channel info to update HBM bad channel
info in OOB table

Signed-off-by: Stanley.Yang <Stanley.Yang@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-03-15 14:25:16 -04:00
Yifan Zhang
7c916f95f5 drm/amdgpu: change registers in error checking for smu 13.0.5
smu 13.0.5 use new registers for smu msg and param.

Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-03-15 14:25:15 -04:00
Danijel Slivka
7952fa0d3e drm/amd/pm: new v3 SmuMetrics data structure for Sienna Cichlid
structure changed in smc_fw_version >= 0x3A4900,
    "uint16_t VcnActivityPercentage" replaced with
    "uint16_t VcnUsagePercentage0" and "uint16_t VcnUsagePercentage1"

Signed-off-by: Danijel Slivka <danijel.slivka@amd.com>
Acked-by: Evan Quan <evan.quan@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-03-02 18:40:07 -05:00
Prike Liang
d7709eb6a1 drm/amdgpu: enable gfxoff routine for GC 10.3.7
Enable gfxoff routine for GC 10.3.7.

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-03-02 18:40:07 -05:00
Yifan Zhang
111aeed25e drm/amdgpu: add gfxoff support for smu 13.0.5
this patch adds gfxoff support for smu 13.0.5

Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-02-25 11:51:18 -05:00
Yifan Zhang
cefbe72496 drm/amd/pm: refine smu 13.0.5 pp table code
Based on smu 13.0.5 features, refine pp table code.

Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-02-25 11:51:18 -05:00