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Author SHA1 Message Date
Dave Airlie
17f1dfd01c Merge branch 'drm-next-4.10' of git://people.freedesktop.org/~agd5f/linux into drm-next
- lots of code cleanup
- lots of bug fixes
- expose rpm based fan info via hwmon
- lots of clock and powergating fixes
- SI register header cleanup and conversion to common format used by newer asics

* 'drm-next-4.10' of git://people.freedesktop.org/~agd5f/linux: (54 commits)
  drm/amdgpu: drop is_display_hung from display funcs
  drm/amdgpu/uvd: reduce IB parsing overhead on UVD5+ (v2)
  drm/amdgpu/uvd: consolidate code for fetching addr from ctx
  drm/amdgpu: Disable DPM in virtualization
  drm/amdgpu: use AMDGPU_GEM_CREATE_VRAM_CLEARED for VM PD/PTs (v2)
  drm/amdgpu: improve AMDGPU_GEM_CREATE_VRAM_CLEARED handling (v2)
  drm/amdgpu: fix error handling in amdgpu_bo_create_restricted
  drm/amdgpu: fix amdgpu_fill_buffer (v2)
  drm/amdgpu: remove amdgpu_irq_get_delayed
  amdgpu: Wrap dev_err() calls on vm faults with printk_ratelimit()
  amdgpu: Use dev_err() over vanilla printk() in vm_decode_fault()
  drm/amd/amdgpu: port of DCE v6 to new headers (v3)
  drm/amdgpu: cleanup unused iterator members for sdma v2.4
  drm/amdgpu: cleanup unused iterator members for sdma v3
  drm/amdgpu:impl vgt_flush for VI(V5)
  drm/amdgpu: enable uvd mgcg for Fiji.
  drm/amdgpu: refine cz uvd clock gate logic.
  drm/amdgpu: change log level to KERN_INFO in ci_dpm.c
  drm/amdgpu: always un-gate UVD REGS path.
  drm/amdgpu/sdma: fix typo in packet setup
  ...
2016-12-06 11:01:33 +10:00
Dave Airlie
f03ee46be9 Linux 4.9-rc8
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Backmerge tag 'v4.9-rc8' into drm-next

Linux 4.9-rc8

Daniel requested this so we could apply some follow on fixes cleanly to -next.
2016-12-05 17:11:48 +10:00
Alex Deucher
e7b8243d3e drm/amdgpu: drop is_display_hung from display funcs
Not used.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-23 15:13:21 -05:00
Rex Zhu
3ca67300ac drm/amdgpu: delete duplicate module parameter.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-11-11 10:21:01 -05:00
Mario Kleiner
8e94a46c17 drm/amdgpu: Attach exclusive fence to prime exported bo's. (v5)
External clients which import our bo's wait only
for exclusive dmabuf-fences, not on shared ones,
ditto for bo's which we import from external
providers and write to.

Therefore attach exclusive fences on prime shared buffers
if our exported buffer gets imported by an external
client, or if we import a buffer from an external
exporter.

See discussion in thread:
https://lists.freedesktop.org/archives/dri-devel/2016-October/122370.html

Prime export tested on Intel iGPU + AMD Tonga dGPU as
DRI3/Present Prime render offload, and with the Tonga
standalone as primary gpu.

v2: Add a wait for all shared fences before prime export,
    as suggested by Christian Koenig.

v3: - Mark buffer prime_exported in amdgpu_gem_prime_pin,
    so we only use the exclusive fence when exporting a
    bo to external clients like a separate iGPU, but not
    when exporting/importing from/to ourselves as part of
    regular DRI3 fd passing.

    - Propagate failure of reservation_object_wait_rcu back
    to caller.

v4: - Switch to a prime_shared_count counter instead of a
      flag, which gets in/decremented on prime_pin/unpin, so
      we can switch back to shared fences if all clients
      detach from our exported bo.

    - Also switch to exclusive fence for prime imported bo's.

v5: - Drop lret, instead use int ret -> long ret, as proposed
      by Christian.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=95472
Tested-by: Mike Lothian <mike@fireburn.co.uk> (v1)
Signed-off-by: Mario Kleiner <mario.kleiner.de@gmail.com>
Reviewed-by: Christian König <christian.koenig@amd.com>.
Cc: Christian König <christian.koenig@amd.com>
Cc: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2016-11-11 10:20:04 -05:00
Junwei Zhang
eef18a827a drm/amdgpu: add the interface of waiting multiple fences (v4)
v2: agd: rebase and squash in all the previous optimizations and
changes so everything compiles.
v3: squash in Slava's 32bit build fix
v4: rebase on drm-next (fence -> dma_fence),
    squash in Monk's ioctl update patch

Signed-off-by: Junwei Zhang <Jerry.Zhang@amd.com>
Reviewed-by: Monk Liu <monk.liu@amd.com>
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Sumit Semwal <sumit.semwal@linaro.org>
 [sumits: fix checkpatch warnings]
Link: http://patchwork.freedesktop.org/patch/msgid/1478290570-30982-2-git-send-email-alexander.deucher@amd.com
2016-11-09 00:28:42 +05:30
Dave Airlie
220196b384 Merge tag 'topic/drm-misc-2016-10-27' of git://anongit.freedesktop.org/git/drm-intel into drm-next
Pull request already again to get the s/fence/dma_fence/ stuff in and
allow everyone to resync. Otherwise really just misc stuff all over, and a
new bridge driver.

* tag 'topic/drm-misc-2016-10-27' of git://anongit.freedesktop.org/git/drm-intel:
  drm/bridge: fix platform_no_drv_owner.cocci warnings
  drm/bridge: fix semicolon.cocci warnings
  drm: Print some debug/error info during DP dual mode detect
  drm: mark drm_of_component_match_add dummy inline
  drm/bridge: add Silicon Image SiI8620 driver
  dt-bindings: add Silicon Image SiI8620 bridge bindings
  video: add header file for Mobile High-Definition Link (MHL) interface
  drm: convert DT component matching to component_match_add_release()
  dma-buf: Rename struct fence to dma_fence
  dma-buf/fence: add an lockdep_assert_held()
  drm/dp: Factor out helper to distinguish between branch and sink devices
  drm/edid: Only print the bad edid when aborting
  drm/msm: add missing header dependencies
  drm/msm/adreno: move function declarations to header file
  drm/i2c/tda998x: mark symbol static where possible
  doc: add missing docbook parameter for fence-array
  drm: RIP mode_config->rotation_property
  drm/msm/mdp5: Advertize 180 degree rotation
  drm/msm/mdp5: Use per-plane rotation property
2016-10-28 11:33:52 +10:00
Tom St Denis
472259f026 drm/amd/amdgpu: re-factor debugfs wave reader
Move IP version specific code into a callback.

Also add support for gfx7 devices.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:48 -04:00
Alex Deucher
a125510721 drm/amdgpu: rework IP block registration (v2)
This makes it easier to replace specific IP blocks on
asics for handling virtual_dce, DAL, etc. and for building
IP lists for hw or tables.  This also stored the status
information in the same structure.

v2: split out spelling fix into a separate patch
    add a function to add IPs to the list

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:45 -04:00
Alex Deucher
cf0978819c drm/amdgpu: move dpm related definitions to amdgpu_dpm.h
No intended functional change.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:38 -04:00
Christian König
e12f3d7a23 drm/amdgpu: move IB and frame size directly into the engine description
I should have suggested that on the initial patchset. This saves us a
few CPU cycles during CS and a bunch of loc.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:36 -04:00
Alex Deucher
e3fa76306f drm/amdgpu: add additional cached gca config variables
We need to cache some additional values to handle SR-IOV
and PG.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:30 -04:00
Christian König
073440d262 drm/amdgpu: move VM defines into amdgpu_vm.h
Only cleanup, no intended functional change.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:29 -04:00
Christian König
7802301611 drm/amdgpu: move fence and ring defines into amdgpu_ring.h
Only cleanup, no intended functional change.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:29 -04:00
Christian König
5611350499 drm/amdgpu: move sync handling into a separate header
Only cleanup, no intended functional change.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:28 -04:00
Christian König
914b4dce4f drm/amdgpu: stop using a bo list entry for the VM PTs
Saves us a bit of memory.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:28 -04:00
Christian König
f7da30d979 drm/amdgpu: move PT validation back into VM code v2
Saves a bunch of CPU cycles when swapping things back in and
allows us to split the VM headers into a separate file.

v2: rename parameters

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:27 -04:00
Christian König
a7d64de659 drm/amdgpu: remove adev pointer from struct amdgpu_bo v2
It's completely pointless to have two pointers to the
device in the same structure.

v2: rename function to amdgpu_ttm_adev, fix typos

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:26 -04:00
Christian König
f8991bab1a drm/amdgpu: update the shadow PD together with the real one v2
Far less CPU cycles needed for this approach.

v2: fix typo

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:25 -04:00
Christian König
6a7f76e70f drm/amdgpu: add VRAM manager v2
Split VRAM allocations into 4MB blocks.

v2: fix typo in comment, some suggested cleanups
v3: document how to disable the feature, fix rebase issue

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Tested-by: Mike Lothian <mike@fireburn.co.uk>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-25 14:38:16 -04:00
Chris Wilson
f54d186700 dma-buf: Rename struct fence to dma_fence
I plan to usurp the short name of struct fence for a core kernel struct,
and so I need to rename the specialised fence/timeline for DMA
operations to make room.

A consensus was reached in
https://lists.freedesktop.org/archives/dri-devel/2016-July/113083.html
that making clear this fence applies to DMA operations was a good thing.
Since then the patch has grown a bit as usage increases, so hopefully it
remains a good thing!

(v2...: rebase, rerun spatch)
v3: Compile on msm, spotted a manual fixup that I broke.
v4: Try again for msm, sorry Daniel

coccinelle script:
@@

@@
- struct fence
+ struct dma_fence
@@

@@
- struct fence_ops
+ struct dma_fence_ops
@@

@@
- struct fence_cb
+ struct dma_fence_cb
@@

@@
- struct fence_array
+ struct dma_fence_array
@@

@@
- enum fence_flag_bits
+ enum dma_fence_flag_bits
@@

@@
(
- fence_init
+ dma_fence_init
|
- fence_release
+ dma_fence_release
|
- fence_free
+ dma_fence_free
|
- fence_get
+ dma_fence_get
|
- fence_get_rcu
+ dma_fence_get_rcu
|
- fence_put
+ dma_fence_put
|
- fence_signal
+ dma_fence_signal
|
- fence_signal_locked
+ dma_fence_signal_locked
|
- fence_default_wait
+ dma_fence_default_wait
|
- fence_add_callback
+ dma_fence_add_callback
|
- fence_remove_callback
+ dma_fence_remove_callback
|
- fence_enable_sw_signaling
+ dma_fence_enable_sw_signaling
|
- fence_is_signaled_locked
+ dma_fence_is_signaled_locked
|
- fence_is_signaled
+ dma_fence_is_signaled
|
- fence_is_later
+ dma_fence_is_later
|
- fence_later
+ dma_fence_later
|
- fence_wait_timeout
+ dma_fence_wait_timeout
|
- fence_wait_any_timeout
+ dma_fence_wait_any_timeout
|
- fence_wait
+ dma_fence_wait
|
- fence_context_alloc
+ dma_fence_context_alloc
|
- fence_array_create
+ dma_fence_array_create
|
- to_fence_array
+ to_dma_fence_array
|
- fence_is_array
+ dma_fence_is_array
|
- trace_fence_emit
+ trace_dma_fence_emit
|
- FENCE_TRACE
+ DMA_FENCE_TRACE
|
- FENCE_WARN
+ DMA_FENCE_WARN
|
- FENCE_ERR
+ DMA_FENCE_ERR
)
 (
 ...
 )

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Gustavo Padovan <gustavo.padovan@collabora.co.uk>
Acked-by: Sumit Semwal <sumit.semwal@linaro.org>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: http://patchwork.freedesktop.org/patch/msgid/20161025120045.28839-1-chris@chris-wilson.co.uk
2016-10-25 14:40:39 +02:00
Grazvydas Ignotas
8a2eef1dbc drm/amdgpu: also track late init state
Successful sw_init() and hw_init() states are tracked, but not
late_init(). Various error paths may result in amdgpu_fini() being
called before .late init is done, so late_init needs to be tracked
to avoid unexpected or multiple .late_fini() calls.

Signed-off-by: Grazvydas Ignotas <notasas@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-10-06 12:39:02 -04:00
Dave Airlie
28a396545a Merge branch 'drm-next-4.9' of git://people.freedesktop.org/~agd5f/linux into drm-next
Some additional fixes for 4.9:
- The rest of Christian's GTT rework which fixes a long standing bug
  in the GPUVM code among other things
- Changes to the pci shutdown callbacks for certain hypervisors
- Fix hpd interrupt storms on eDP panels which have the hpd interrupt
  enabled by the bios
- misc cleanups and bug fixes

* 'drm-next-4.9' of git://people.freedesktop.org/~agd5f/linux: (33 commits)
  drm/radeon: always apply pci shutdown callbacks
  drm/amdgpu: always apply pci shutdown callbacks (v2)
  drm/amdgpu: improve VM PTE trace points
  drm/amdgpu: fix GART_DEBUGFS define
  drm/amdgpu: free userptrs even if GTT isn't bound
  drm/amd/amdgpu: Various cleanups for DCEv6
  drm/amdgpu: fix BO move offsets
  drm/amdgpu: fix amdgpu_move_blit on 32bit systems
  drm/amdgpu: fix gtt_mgr bo's offset
  drm/amdgpu: fix initializing the VM BO shadow
  drm/amdgpu: fix initializing the VM last eviction counter
  drm/amdgpu: cleanup VM shadow BO unreferencing
  drm/amdgpu: allocate GTT space for shadow VM page tables
  drm/amdgpu: rename all rbo variable to abo v2
  drm/amdgpu: remove unused member from struct amdgpu_bo
  drm/amdgpu: add a custom GTT memory manager v2
  drm/amdgpu/dce6: disable hpd on local panels
  drm/amdgpu/dce8: disable hpd on local panels
  drm/amdgpu/dce11: disable hpd on local panels
  drm/amdgpu/dce10: disable hpd on local panels
  ...
2016-09-30 13:21:02 +10:00
Christian König
765e7fbf08 drm/amdgpu: rename all rbo variable to abo v2
Just to cleanup some radeon leftovers.

sed -i "s/rbo/abo/g" drivers/gpu/drm/amd/amdgpu/*.c
sed -i "s/rbo/abo/g" drivers/gpu/drm/amd/amdgpu/*.h

v2: rebased

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-09-28 16:16:20 -04:00
Christian König
1927ffc0c1 drm/amdgpu: remove unused member from struct amdgpu_bo
Not used in a while.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-09-28 16:16:20 -04:00
Dave Airlie
ca09fb9f60 Linux 4.8-rc8
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Merge tag 'v4.8-rc8' into drm-next

Linux 4.8-rc8

There was a lot of fallout in the imx/amdgpu/i915 drivers, so backmerge
it now to avoid troubles.

* tag 'v4.8-rc8': (1442 commits)
  Linux 4.8-rc8
  fault_in_multipages_readable() throws set-but-unused error
  mm: check VMA flags to avoid invalid PROT_NONE NUMA balancing
  radix tree: fix sibling entry handling in radix_tree_descend()
  radix tree test suite: Test radix_tree_replace_slot() for multiorder entries
  fix memory leaks in tracing_buffers_splice_read()
  tracing: Move mutex to protect against resetting of seq data
  MIPS: Fix delay slot emulation count in debugfs
  MIPS: SMP: Fix possibility of deadlock when bringing CPUs online
  mm: delete unnecessary and unsafe init_tlb_ubc()
  huge tmpfs: fix Committed_AS leak
  shmem: fix tmpfs to handle the huge= option properly
  blk-mq: skip unmapped queues in blk_mq_alloc_request_hctx
  MIPS: Fix pre-r6 emulation FPU initialisation
  arm64: kgdb: handle read-only text / modules
  arm64: Call numa_store_cpu_info() earlier.
  locking/hung_task: Fix typo in CONFIG_DETECT_HUNG_TASK help text
  nvme-rdma: only clear queue flags after successful connect
  i2c: qup: skip qup_i2c_suspend if the device is already runtime suspended
  perf/core: Limit matching exclusive events to one PMU
  ...
2016-09-28 12:08:49 +10:00
Alex Deucher
efc83cf423 drm/amdgpu/atpx: check for ATIF dGPU wake for display events support
Some ATPX laptops implement special circuitry to generate
display hotplug events via ACPI when the dGPU is powered off.
Check if this is supported.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-09-22 10:30:30 -04:00
Monk Liu
ceeb50ed77 drm/amdgpu:cleanup virt related define
move virtual machine related structure to amdgpu_virt.h
easy for developer to maintain for virualization stuffs

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-09-22 10:24:20 -04:00
Tom St Denis
3de4ec5727 drm/amd/powerplay: Replace per-asic print_performance with generic
Replace per-asic print_current_performance() functions with generic
that calls read_sensor.  Tested on Tonga and Carrizo for aesthetics
and accuracy.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-09-22 10:24:16 -04:00
Monk Liu
4e99a44e37 drm/amdgpu:changes of virtualization cases probe (v3)
1,Changes on virtualization detections
2,Don't load smu & mc firmware if using sr-iov bios
3,skip vPost for sriov & force vPost if dev pass-through

v2: agd: squash in Rays's fix for the missed SI case
v3: agd: squash in additional fixes for CIK, SI, cleanup

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-09-19 14:45:52 -04:00
Baoyou Xie
9f31a0b032 drm/amdgpu: clean function declarations in amdgpu_ttm.c up
We get 2 warnings when building kernel with W=1:

drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c:985:5: warning: no previous prototype for 'amdgpu_ttm_init' [-Wmissing-prototypes]
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c:1092:6: warning: no previous prototype for 'amdgpu_ttm_fini' [-Wmissing-prototypes]

In fact, both functions are declared in
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c, but should be declared in
a header file, thus can be recognized in other file.

So this patch moves the declarations into
drivers/gpu/drm/amd/amdgpu/amdgpu.h.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Baoyou Xie <baoyou.xie@linaro.org>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-09-16 15:53:04 -04:00
Alex Deucher
b6384ff537 drm/amdgpu/ring: add an interface to get dma frame and ib size
Used to properly calculate space on the ring for ib submissions.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-09-16 15:52:55 -04:00
Rex Zhu
5141e9d2f7 drm/amd/powerplay: add module parameter to mask pp features
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-09-14 15:10:33 -04:00
Christian König
c855e25090 drm/amdgpu: bind GTT on demand
We don't really need the GTT table any more most of the time. So bind it
only on demand.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-09-14 15:10:30 -04:00
Monk Liu
753ad49c9f drm/amdgpu:implement CONTEXT_CONTROL (v5)
v1:
for gfx8, use CONTEXT_CONTROL package to dynamically
skip preamble CEIB and other load_xxx command in sequence.

v2:
support GFX7 as well.
remove cntxcntl in compute ring funcs because CPC doesn't
support this packet.

v3: fix reduntant judgement in cntxcntl.
v4: some cleanups, don't change cs_submit()
v5: keep old MESA supported & bump up KMS version.

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Ack-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-09-14 15:10:29 -04:00
Monk Liu
3aecd24c65 drm/amdgpu: change job->ctx field name
job->ctx actually is a fence_context of the entity
it belongs to, naming it as ctx is too vague, and
we'll need add amdgpu_ctx into the job structure
later.

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-09-12 18:12:17 -04:00
Christian König
662bfa61ff drm/amdgpu: prevent command submission failures under memory pressure v2
As last resort try to evict BOs from the current working set into other
memory domains. This effectively prevents command submission failures when
VM page tables have been swapped out.

v2: fix typos

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-09-02 11:30:41 -04:00
Chunming Zhou
2c0d7318c8 drm/amdgpu: add gart recovery by gtt list V2
V2:
a. gart recovery should be ahead of ring test.
b. rename to amdgpu_ttm_recover_gart

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-31 15:21:13 -04:00
Chunming Zhou
5c1354bd30 drm/amdgpu: link all gtt when binding them V2
V2:
spin lock instead of mutex for gtt list

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-31 15:21:12 -04:00
Maruthi Bayyavarapu
841686df9f drm/amdgpu: add SI DPM support (v4)
v2: corrected register offset shift
v3: rebase fixes
v4: fix firmware paths
    add SI smc firmware versions for sysfs dump
    remove unused function forward define
    fix the tahiti specific value of DEEP_SLEEP_CLK_SEL field
    fix to miss adding thermal controller
    use vram_type instead of checking mem_gddr5 flag
    fix incorrect index of CG_FFCT_0 register
    fix incorrect reading method at si_get_current_pcie_speed

Signed-off-by: Maruthi Bayyavarapu <maruthi.bayyavarapu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-31 15:21:09 -04:00
Huang Rui
36b9a952bb drm/amdgpu: introduce pcie port read/write entry
This patch adds pcie port read/write entry, because it will be also
used on si dpm part.

Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-31 12:11:20 -04:00
Ken Wang
30d1574fa4 drm/amdgpu: add DMA implementation for si v8
v4: rebase fixes
v5: use the generic nop fill
v6: rebase fixes
v7: rebase fixes
    copy count fixes from Jonathan
    general cleanup
    add fill buffer implementation
v8: adapt write_pte and copy_pte to latest changes

Signed-off-by: Ken Wang <Qingqing.Wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-31 12:10:51 -04:00
Monk Liu
c2167a659c drm/amdgpu:add switch buffer to end of CS (v2)
sync switch buffer scheme with windows kmd for gfx v8,
step1: append a switch_buffer to the end of CS

v2:rebase on latest staging

Signed-off-by: Monk Liu <Monk.Liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-30 17:55:45 -04:00
Marek Olšák
95844d20ae drm/amdgpu: throttle buffer migrations at CS using a fixed MBps limit (v2)
The old mechanism used a per-submission limit that didn't take previous
submissions within the same time frame into account. It also filled VRAM
slowly when VRAM usage dropped due to a big eviction or buffer deallocation.

This new method establishes a configurable MBps limit that is obeyed when
VRAM usage is very high. When VRAM usage is not very high, it gives
the driver the freedom to fill it quickly. The result is more consistent
performance.

It can't keep the BO move rate low if lots of evictions are happening due
to VRAM fragmentation, or if a big buffer is being migrated.

The amdgpu.moverate parameter can be used to set a non-default limit.
Measurements can be done to find out which amdgpu.moverate setting gives
the best results.

Mainly APUs and cards with small VRAM will benefit from this. For F1 2015,
anything with 2 GB VRAM or less will benefit.

Some benchmark results - F1 2015 (Tonga 2GB):

Limit      MinFPS AvgFPS
Old code:  14     32.6
128 MB/s:  28     41
64 MB/s:   15.5   43
32 MB/s:   28.7   43.4
8 MB/s:    27.8   44.4
8 MB/s:    21.9   42.8 (different run)

Random drops in Min FPS can still occur (due to fragmented VRAM?), but
the average FPS is much better. 8 MB/s is probably a good limit for this
game & the current VRAM management. The random FPS drops are still to be
tackled.

v2: use a spinlock

Signed-off-by: Marek Olšák <marek.olsak@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-30 17:54:30 -04:00
Alex Deucher
6f0359ff73 drm/amdgpu/vce3: add support for third vce ring
Not of much use at the moment (we don't really use
the second ring either), but may be useful later.

Reviewed-by: JimQu <Jim.Qu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-25 11:21:51 -04:00
Alex Deucher
75c65480ba drm/amdgpu: track the number of vce rings
Rather than using a hardcoded value.  This allows
different versions to expose more or less rings.

No functional change.

Reviewed-by: JimQu <Jim.Qu@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-25 11:21:43 -04:00
Alex Deucher
810ddc3ab5 drm/amdgpu: rename suspend_kms and resume_kms
The old names were dragged over from radeon.  The new ones
better match the naming conventions used in the driver.

No functional change.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-25 11:19:38 -04:00
Christian König
5661538749 drm/amdgpu: fix lru size grouping v2
Adding a BO can make it the insertion point for larger sizes as well.

v2: add a comment about the guard structure.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Felix Kuehling <felix.kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2016-08-24 10:27:49 -04:00
Christian König
99e124f402 drm/amdgpu: cleanup amdgpu_vm_bo_update params
Make it more obvious what we are doing here.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-22 13:47:24 -04:00
Chunming Zhou
0c4e7fa561 drm/amdgpu: link all shadow bo V2
V2:
1. use mutex instead of spinlock for shadow list, since its process could
sleep.
2. move list_del to bo destroy phase.

Signed-off-by: Chunming Zhou <David1.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2016-08-22 13:47:20 -04:00