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17120 commits

Author SHA1 Message Date
Gang Ba
4c7e8a9e9f drm/amdgpu: Change the way to determine framebuffer type
Determine FRAMEBUFFER_PUBLIC/PRIVATE only based host-accessibility,
not peer-accesssibility

Signed-off-by: Gang Ba <gaba@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-04 17:09:03 -05:00
Christian König
19201c075d drm/amdgpu: fix off by one in amdgpu_vm_handle_fault
The value is inclusive, not exclusive.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-04 17:08:55 -05:00
Tao Zhou
413949ee1c drm/amdgpu: enable GFXOFF for dimgrey_cavefish
GFXOFF has been supported by PMFW, enable it directly in driver for
dimgrey_cavefish.

Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-04 17:08:48 -05:00
John Clements
c26dab27e5 drm/amdgpu: resolved ASD loading issue on sienna
updated fw header v2 parser to set asd fw memory

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: John Clements <john.clements@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-04 17:08:41 -05:00
Jinzhou.Su
a3964ec40f drm/amdgpu: Enable FGCG for Vangogh
Add flags AMD_CG_SUPPORT_GFX_FGCG for Vangogh

Signed-off-by: Jinzhou.Su <Jinzhou.Su@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-04 17:08:36 -05:00
Jinzhou.Su
8c11024cf6 drm/amdgpu: Add Fine Grain Clock Gating for GFX10
1. Add FGCG for gfx10
2. Get FGCG status for pm info debugfs

Signed-off-by: Jinzhou.Su <Jinzhou.Su@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-04 17:08:29 -05:00
Jinzhou.Su
adf1699636 drm/amdgpu: Add GFX Fine Grain Clock Gating flag
Add AMD_CG_SUPPORT_GFX_FGCG for FGCG

Signed-off-by: Jinzhou.Su <Jinzhou.Su@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-04 17:08:08 -05:00
Alex Deucher
4241b0411c drm/amdgpu/display: remove DRM_AMD_DC_GREEN_SARDINE
No need for a separate config option at this point.

Reviewed-by: Luben Tuikov <luben.tuikov@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-04 08:43:50 -05:00
Roman Li
c236c0e5f5 drm/amd/display: Add green_sardine support to DM
Display Manager support for green_sardine

Signed-off-by: Roman Li <Roman.Li@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-04 08:40:42 -05:00
Roman Li
4a5346df6a drm/amd/display: Add green_sardine support to DC
Display Core support for green_sardine

Signed-off-by: Roman Li <Roman.Li@amd.com>
Acked-by: Hersen Wu <hersenxs.wu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-04 08:40:42 -05:00
Thong Thai
d83d3ad61c drm/amdgpu: enable vcn support for green_sardine (v2)
Enable Green_Sardine VCN support and VCN firmware loading

v2: use apu flags

Signed-off-by: Thong Thai <thong.thai@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-04 08:33:47 -05:00
Aaron Liu
6869798220 drm/amdgpu: enable green_sardine_asd.bin loading (v2)
This patch enable green_sardine_asd.bin loading.

v2: use apu flags

Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Prike Liang <Prike.Liang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-04 08:33:22 -05:00
Prike Liang
f21aab1b31 drm/amdgpu/sdma: add sdma engine support for green_sardine (v2)
Initialize the SDMA IP for green_sardine.

v2: use apu flags

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-04 08:33:05 -05:00
Prike Liang
445b011d4a drm/amdgpu: add gfx support for green_sardine (v2)
Enable the gfx base HW function of green_sardine.

v2: use apu flags

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-04 08:32:45 -05:00
Prike Liang
aee68369ec drm/amdgpu: add soc15 common ip block support for green_sardine (v3)
This patch adds common ip support for green_sardine.

v2: use apu flags, squash in CG/PG enablement
v3: rebase

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-04 08:32:14 -05:00
Prike Liang
c38577a480 drm/amdgpu: add green_sardine support for gpu_info and ip block setting (v2)
This patch adds green_sardine support for gpu_info firmware and ip block setting.

v2: use apu flag

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-04 08:31:52 -05:00
Alex Deucher
7be89985c4 drm/amdgpu: add Green_Sardine APU flag
Will be used for Green_Sardine which is a new APU.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-04 08:30:48 -05:00
Christian König
c44dfe4de0 drm/ttm: replace context flags with bools v2
The ttm_operation_ctx structure has a mixture of flags and bools. Drop the
flags and replace them with bools as well.

v2: fix typos, improve comments

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: https://patchwork.freedesktop.org/patch/398686/
2020-11-04 11:23:25 +01:00
Christian König
586052b0a6 drm/ttm: rework no_retry handling v2
During eviction we do want to trigger the OOM killer.

Only while doing new allocations we should try to avoid that and
return -ENOMEM to the application.

v2: rename the flag to gfp_retry_mayfail.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Link: https://patchwork.freedesktop.org/patch/398685/
2020-11-04 11:22:46 +01:00
John Clements
26f4fd6d87 drm/amdgpu: resolved ASD loading issue on sienna
updated fw header v2 parser to set asd fw memory

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: John Clements <john.clements@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org # 5.9.x
2020-11-03 21:06:04 -05:00
Kent Russell
2e3a57f490 amdkfd: Check kvmalloc return before memcpy
If we can't kvmalloc the pcrat_image, then we shouldn't memcpy

Signed-off-by: Kent Russell <kent.russell@amd.com>
Reported-by: kernel test robot <lkp@intel.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-03 21:00:40 -05:00
Likun Gao
a2404fd482 drm/amdgpu: update golden setting for sienna_cichlid
Update golden setting for sienna_cichlid.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2020-11-03 20:59:53 -05:00
Veerabadhran Gopalakrishnan
c6d2b0fbb8 amd/amdgpu: Disable VCN DPG mode for Picasso
Concurrent operation of VCN and JPEG decoder in DPG mode is
causing ring timeout due to power state.

Signed-off-by: Veerabadhran Gopalakrishnan <veerabadhran.gopalakrishnan@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-03 20:57:50 -05:00
Alex Deucher
e69251e7dc drm/amdgpu/swsmu: remove duplicate call to smu_set_default_dpm_table
For kernel 5.10, this function was called twice right next to each
other in the same function due to what looks like a mis-merge.

Remove one of them.

Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-03 20:40:25 -05:00
Linus Torvalds
e6b0bd61a7 This pull contains a series of warning fixes from Mauro; once applied, the
number of warnings from the once-noisy docs build process is nearly zero.
 Getting to this point has required a lot of work; once there, hopefully we
 can keep things that way.
 
 I have packaged this as a separate pull because it does a fair amount of
 reaching outside of Documentation/.  The changes are all in comments and in
 code placement.  It's all been in linux-next since last week.
 -----BEGIN PGP SIGNATURE-----
 
 iQFDBAABCAAtFiEEIw+MvkEiF49krdp9F0NaE2wMflgFAl+hscQPHGNvcmJldEBs
 d24ubmV0AAoJEBdDWhNsDH5YgZAH/0JeDA/1VLZYYTmdABz8mjBZsoW9tyPGGztF
 nsh5ykdHhL3MeTRwumW5armLVrfKhd1XT+nIzD7OcWlqu+RDOvQ5I95rahr473hP
 1SHTjqm3/AlJwQoeS72X5U6QEJQ58e2IwCbP23H3x7I3Q3snEA/HhswzxurfoB/Z
 j81YzDV2YPEc0LJWZ5Vn0NEdwP8cdpFv5rojsQmepq7K0yJ7tEHb7/u2cEuUBgXS
 8LcYCNPLpiN+q5N8uQ5oDjIUNdLQvP03kgKtQWiCTr4BRydOrDlJie28LIedamEz
 anu7UfaVK4bxn+ugRI0g2+aWQKux81ULCinKUWmLRNbcxjhaQqQ=
 =hDfp
 -----END PGP SIGNATURE-----

Merge tag 'docs-5.10-warnings' of git://git.lwn.net/linux

Pull documentation build warning fixes from Jonathan Corbet:
 "This contains a series of warning fixes from Mauro; once applied, the
  number of warnings from the once-noisy docs build process is nearly
  zero.

  Getting to this point has required a lot of work; once there,
  hopefully we can keep things that way.

  I have packaged this as a separate pull because it does a fair amount
  of reaching outside of Documentation/. The changes are all in comments
  and in code placement. It's all been in linux-next since last week"

* tag 'docs-5.10-warnings' of git://git.lwn.net/linux: (24 commits)
  docs: SafeSetID: fix a warning
  amdgpu: fix a few kernel-doc markup issues
  selftests: kselftest_harness.h: fix kernel-doc markups
  drm: amdgpu_dm: fix a typo
  gpu: docs: amdgpu.rst: get rid of wrong kernel-doc markups
  drm: amdgpu: kernel-doc: update some adev parameters
  docs: fs: api-summary.rst: get rid of kernel-doc include
  IB/srpt: docs: add a description for cq_size member
  locking/refcount: move kernel-doc markups to the proper place
  docs: lockdep-design: fix some warning issues
  MAINTAINERS: fix broken doc refs due to yaml conversion
  ice: docs fix a devlink info that broke a table
  crypto: sun8x-ce*: update entries to its documentation
  net: phy: remove kernel-doc duplication
  mm: pagemap.h: fix two kernel-doc markups
  blk-mq: docs: add kernel-doc description for a new struct member
  docs: userspace-api: add iommu.rst to the index file
  docs: hwmon: mp2975.rst: address some html build warnings
  docs: net: statistics.rst: remove a duplicated kernel-doc
  docs: kasan.rst: add two missing blank lines
  ...
2020-11-03 13:14:14 -08:00
Deepak R Varma
8acedab0fd drm/amdgpu: use "*" adjacent to data name
When declaring pointer data, the "*" symbol should be used adjacent to
the data name as per the coding standards. This resolves following
issues reported by checkpatch script:
	ERROR: "foo *   bar" should be "foo *bar"
	ERROR: "foo * bar" should be "foo *bar"
	ERROR: "foo*            bar" should be "foo *bar"
	ERROR: "(foo*)" should be "(foo *)"

Signed-off-by: Deepak R Varma <mh12gx2825@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-02 15:35:53 -05:00
Deepak R Varma
c4c5ae67d1 drm/amdgpu/amdgpu: use "*" adjacent to data name
When declaring pointer data, the "*" symbol should be used adjacent to
the data name as per the coding standards. This resolves following
issues reported by checkpatch script:
	ERROR: "foo *   bar" should be "foo *bar"
	ERROR: "foo * bar" should be "foo *bar"
	ERROR: "foo*            bar" should be "foo *bar"
	ERROR: "(foo*)" should be "(foo *)"

Signed-off-by: Deepak R Varma <mh12gx2825@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-02 15:35:50 -05:00
Deepak R Varma
8e607d7e27 drm/amdgpu/sdma: use "*" adjacent to data name
When declaring pointer data, the "*" symbol should be used adjacent to
the data name as per the coding standards. This resolves following
issues reported by checkpatch script:
	ERROR: "foo *   bar" should be "foo *bar"
	ERROR: "foo * bar" should be "foo *bar"
	ERROR: "foo*            bar" should be "foo *bar"
	ERROR: "(foo*)" should be "(foo *)"

Signed-off-by: Deepak R Varma <mh12gx2825@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-02 15:35:48 -05:00
Deepak R Varma
77f5c7370f drm/amdgpu/jpeg: use "*" adjacent to data name
When declaring pointer data, the "*" symbol should be used adjacent to
the data name as per the coding standards. This resolves following
issues reported by checkpatch script:
	ERROR: "foo *   bar" should be "foo *bar"
	ERROR: "foo * bar" should be "foo *bar"
	ERROR: "foo*            bar" should be "foo *bar"
	ERROR: "(foo*)" should be "(foo *)"

Signed-off-by: Deepak R Varma <mh12gx2825@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-02 15:35:46 -05:00
Deepak R Varma
58b5a793ff drm/amdgpu/umc: use "*" adjacent to data name
When declaring pointer data, the "*" symbol should be used adjacent to
the data name as per the coding standards. This resolves following
issues reported by checkpatch script:
	ERROR: "foo *   bar" should be "foo *bar"
	ERROR: "foo * bar" should be "foo *bar"
	ERROR: "foo*            bar" should be "foo *bar"
	ERROR: "(foo*)" should be "(foo *)"

Signed-off-by: Deepak R Varma <mh12gx2825@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-02 15:35:44 -05:00
Deepak R Varma
715c84ffbd drm/amdgpu/vcn: use "*" adjacent to data name
When declaring pointer data, the "*" symbol should be used adjacent to
the data name as per the coding style standards. This resolves following
issues reported by checkpatch script:
	ERROR: "foo *   bar" should be "foo *bar"
	ERROR: "foo * bar" should be "foo *bar"
	ERROR: "foo*            bar" should be "foo *bar"
	ERROR: "(foo*)" should be "(foo *)"

Signed-off-by: Deepak R Varma <mh12gx2825@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-02 15:35:41 -05:00
Alex Deucher
e6cd859dc6 drm/amdgpu/display: fix warnings when CONFIG_DRM_AMD_DC_DCN is not set
Properly protect the relevant code with CONFIG_DRM_AMD_DC_DCN.

Fixes: 0b08c54bb7 ("drm/amd/display: Fix the display corruption issue on Navi10")
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-02 15:34:33 -05:00
Deepak R Varma
94ba290da1 drm/amdgpu: improve code indentation and alignment
General code indentation and alignment changes such as replace spaces
by tabs or align function arguments as per the coding style
guidelines. The patch covers various .c files for this driver.
Issue reported by checkpatch script.

Signed-off-by: Deepak R Varma <mh12gx2825@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-02 15:34:31 -05:00
Deepak R Varma
f3729f7b1a drm/amdgpu/amdgpu: improve code indentation and alignment
General code indentation and alignment changes such as replace spaces
by tabs or align function arguments as per the coding style
guidelines. The patch corrects issues for various amdgpu_*.c files
for this driver. Issue reported by checkpatch script.

Signed-off-by: Deepak R Varma <mh12gx2825@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-02 15:34:29 -05:00
Deepak R Varma
983ad52838 drm/amdgpu/nbio: improve code indentation and alignment
General code indentation and alignment changes such as replace spaces
by tabs or align function arguments as per the coding style
guidelines. Issue reported by checkpatch script.

Signed-off-by: Deepak R Varma <mh12gx2825@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-02 15:34:27 -05:00
Deepak R Varma
a971887e02 drm/amdgpu/vcn: improve code indentation and alignment
General code indentation and alignment changes such as replace spaces
by tabs or align function arguments as per the coding style
guidelines. Issue reported by checkpatch script.

Signed-off-by: Deepak R Varma <mh12gx2825@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-02 15:34:25 -05:00
Deepak R Varma
99dac206b0 drm/amdgpu/gfx: improve code indentation and alignment
General code indentation and alignment changes such as replace spaces
by tabs or align function arguments as per the coding style
guidelines. Issue reported by checkpatch script.

Signed-off-by: Deepak R Varma <mh12gx2825@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-02 15:34:22 -05:00
Deepak R Varma
ed40c57857 drm/amdgpu/dce: improve code indentation and alignment
General code indentation and alignment changes such as replace spaces
by tabs or align function arguments as per the coding style
guidelines. Issue reported by checkpatch script.

Signed-off-by: Deepak R Varma <mh12gx2825@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-02 15:34:17 -05:00
Colin Ian King
7dee4d51e9 drm/amdgpu: fix spelling mistake: "Successed" -> "Succeeded"
There is a spelling mistake in a deb_dbg message. Fix it.

Reviewed-by: Madhav Chauhan <madhav.chauhan@amd.com>
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-02 15:34:13 -05:00
Bernard Zhao
ab8b5aafa9 drm/amd: fix typoes
Fix typoes.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Bernard Zhao <bernard@vivo.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-02 15:33:46 -05:00
Alex Deucher
9d6f27f9de drm/amdgpu: allow TMZ on vangogh
Uses the same pathes as navi.

Reviewed-by: Aaron Liu <aaron.liu@amd.com>
Reviewed-by: Luben Tuikov <luben.tuikov@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-02 15:33:41 -05:00
Kent Russell
9d17df77bc amdkfd: Check kvmalloc return before memcpy
If we can't kvmalloc the pcrat_image, then we shouldn't memcpy

Signed-off-by: Kent Russell <kent.russell@amd.com>
Reported-by: kernel test robot <lkp@intel.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-02 15:33:33 -05:00
Huang Rui
4dbcdc9cad drm/amd/display: fix the NULL pointer that missed set_disp_pattern_generator callback
This patch is to fix the NULL pointer that missed set_disp_pattern_generator callback on DCN301

[  505.054167] BUG: kernel NULL pointer dereference, address: 0000000000000000
[  505.054176] #PF: supervisor instruction fetch in kernel mode
[  505.054181] #PF: error_code(0x0010) - not-present page
[  505.054185] PGD 0 P4D 0
[  505.054199] Oops: 0010 [#1] SMP NOPTI
[  505.054211] CPU: 6 PID: 1306 Comm: modprobe Tainted: G        W  OE     5.9.0-rc5-custom #1
[  505.054216] Hardware name: AMD Chachani-VN/Chachani-VN, BIOS WCH0A29N_RAPV16.FD 10/29/2020
[  505.054225] RIP: 0010:0x0
[  505.054234] Code: Bad RIP value.
[  505.054239] RSP: 0018:ffffb88541c66f60 EFLAGS: 00010206
[  505.054245] RAX: 0000000000000000 RBX: ffff912836070000 RCX: 0000000000000003
[  505.054248] RDX: 000000000000000c RSI: ffff9128365001e8 RDI: ffff912836070000
[  505.054252] RBP: ffffb88541c66fd8 R08: 0000000000000002 R09: ffffb88541c66fa2
[  505.054265] R10: 0000000000009580 R11: 0000000000000008 R12: ffff9128365001e8
[  505.054272] R13: 000000000000000c R14: 0000000000000438 R15: ffff9128a48bd000
[  505.054279] FS:  00007f09f999f540(0000) GS:ffff9128b3f80000(0000) knlGS:0000000000000000
[  505.054284] CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
[  505.054288] CR2: ffffffffffffffd6 CR3: 00000002db98c000 CR4: 0000000000350ee0
[  505.054291] Call Trace:
[  505.055024]  dcn20_blank_pixel_data+0x148/0x260 [amdgpu]
[  505.055730]  dcn20_enable_stream_timing+0x381/0x47c [amdgpu]
[  505.056641]  dce110_apply_ctx_to_hw+0x337/0x577 [amdgpu]
[  505.056667]  ? put_object+0x2f/0x40
[  505.057329]  dc_commit_state+0x4b3/0x9d0 [amdgpu]
[  505.058030]  amdgpu_dm_atomic_commit_tail+0x405/0x1ec6 [amdgpu]
[  505.058053]  ? update_stack_state+0x103/0x170
[  505.058071]  ? __module_text_address+0x12/0x60

Signed-off-by: Huang Rui <ray.huang@amd.com>
Tested-by: Changfeng <Changfeng.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-02 15:33:26 -05:00
Alex Sierra
c1059360d7 drm/amdgpu: replace ih ip block for vega20 and arcturus
[Why]
Vega20 and Arcturus asics use oss 5.0 version.

[How]
Replace ih ip block by navi10 for vega20 and arcturus.

Signed-off-by: Alex Sierra <alex.sierra@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-02 15:33:19 -05:00
Evan Quan
adc9da6491 drm/amdgpu: apply dm_pp_notify_wm_clock_changes() for Polaris only
Will expand it to other ASICs after verified.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-and-tested-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-02 15:33:12 -05:00
Likun Gao
998d76368d drm/amdgpu: update golden setting for sienna_cichlid
Update golden setting for sienna_cichlid.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-02 15:33:05 -05:00
Jinzhou.Su
0ebce667e8 amdgpu: Add mmhub MGCG and MGLS for vangogh
Add AMD_CG_SUPPORT_MC_MGCG and AMD_CG_SUPPORT_MC_LS

Signed-off-by: Jinzhou.Su <Jinzhou.Su@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-02 15:32:58 -05:00
Pratik Vishwakarma
57eeaf47a6 drm/amd/display: Tune min clk values for MPO for RV
[Why]
Incorrect values were resulting in flash lines
when MPO was enabled and system was left idle.

[How]
Increase min clk values only when MPO is enabled
and display is active to not affect S3 power.

Signed-off-by: Pratik Vishwakarma <Pratik.Vishwakarma@amd.com>
Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-02 15:32:50 -05:00
Jiansong Chen
ef3b298725 drm/amdgpu: disable gfxoff if VCN is busy
Toggle on/off gfxoff during video playback to fix gpu hang.

v2: change sequence to be more compatible with original code.

Signed-off-by: Jiansong Chen <Jiansong.Chen@amd.com>
Reviewed-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-02 15:32:43 -05:00
Dmytro Laktyushkin
84aef2ab09 drm/amd/display: fix recout calculation for left side clip
Recout calculation does not corrrectly handle plane
clip rect that extends beyond the left most border
of stream source rect. This change adds handling by
truncating the invisible clip rect.

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Reviewed-by: Hersen Wu <hersenxs.wu@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-02 15:32:37 -05:00