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14 commits

Author SHA1 Message Date
Ben Skeggs
cde540211a drm/nouveau/fifo/gk104-: fix parsing of mmu fault data
Pascal was particularly incorrect, as the register changed to be more in the
same format as the MMU fault buffers are.

Shouldn't have impacted much more than confusing MMU fault log messages.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-08-23 12:55:32 +10:00
Ben Skeggs
fb80ad15f8 drm/nouveau/fifo/gk104-: group pbdma functions together
We're about to be adding more of them.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-12-11 15:37:48 +10:00
Ben Skeggs
efa44c664f drm/nouveau/fifo/gk104-: separate runlist building from committing to hw
We will need to bash different registers on Turing.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-12-11 15:37:48 +10:00
Ben Skeggs
eda12417d3 drm/nouveau/fifo/gm107-: write instance address in channel runlist entry
RM does this for some reason.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:22 +10:00
Ben Skeggs
79bb4b617f drm/nouveau/fifo/gk208-: write pbdma timeout regs during initialisation
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:22 +10:00
Ben Skeggs
8c4e9f9dff drm/nouveau/fifo/gk110-: support writing channel group runlist entries
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:22 +10:00
Ben Skeggs
665870837a drm/nouveau/fifo/gk104-: add interfaces to support different runlist layouts
This will be required to support features on newer hardware.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:21 +10:00
Ben Skeggs
f9360c3aa6 drm/nouveau/fifo/gk104-: simplify definition of channel classes
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:21 +10:00
Ben Skeggs
ddc669e256 drm/nouveau/fifo/gk104-: allow fault recovery code to be called by other subdevs
This will be required to support Volta.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:21 +10:00
Ben Skeggs
ec884f74f1 drm/nouveau/fifo/gf100-: recover from host mmu faults
This has been on the TODO list for a while now, recovering from things
such as attempting to execute a push buffer or touch a semaphore in an
unmapped memory area.

The only thing required on the HW side here is that the offending
channel is removed from the runlist, and *not* a full reset of PFIFO.

This used to be a bit messier to handle before the rework to make use
of engine topology info, but is apparently now trivial.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-12-13 11:38:51 +10:00
Ben Skeggs
0cdc3fdfb7 drm/nouveau/fifo/gm107-: remove engines from mmu engine mapping array
These are specified by PTOP on Maxwell GPUs.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20 14:43:04 +10:00
Ben Skeggs
91419acf78 drm/nouveau/fifo/gk104-: abstract mmu fault data structures
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20 14:43:04 +10:00
Ben Skeggs
98ac3f061a drm/nouveau/fifo/gk104-: subclass func
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20 14:43:04 +10:00
Ben Skeggs
7c4f87c9e5 drm/nouveau/fifo/gm107: KeplerChannelGpfifoB, and 2048 channels
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-03-14 10:13:48 +10:00