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34 commits

Author SHA1 Message Date
Ben Skeggs
a98a3c52f8 drm/nouveau/fifo/gv100: allocate method buffer
The GPU saves off some stuff to the address specified in this part of RAMFC
when the channel faults, so we should probably point it at a valid address.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-12-11 15:37:49 +10:00
Ben Skeggs
efa44c664f drm/nouveau/fifo/gk104-: separate runlist building from committing to hw
We will need to bash different registers on Turing.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-12-11 15:37:48 +10:00
Ben Skeggs
85532bd984 drm/nouveau/fifo/gk104-: support enabling privileged ce functions
Will be used by SVM code to allow direct (without going through MMU) memcpy
using the GPU copy engines.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-12-11 15:37:47 +10:00
Ben Skeggs
86b442d74c drm/nouveau/fifo/gk104-: return channel instance in ctor args
Will be used to match fault buffer entries with a channel.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-12-11 15:37:47 +10:00
Ben Skeggs
936a1678f3 drm/nouveau/core: support multiple nvdec instances
Turing GPUs can have more than one.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-12-11 15:37:44 +10:00
Ben Skeggs
37e1c45a58 drm/nouveau/fifo/gv100: initial support
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:46 +10:00
Ben Skeggs
334cc26d4d drm/nouveau/fifo/gp100-: force individual channels into a channel group
RM does this for some reason, and is enforced in HW on Volta.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:22 +10:00
Ben Skeggs
f9360c3aa6 drm/nouveau/fifo/gk104-: simplify definition of channel classes
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:21 +10:00
Ben Skeggs
a7cf01809b drm/nouveau/fifo/gk104-: require explicit runlist selection for channel allocation
We didn't used to be aware that runlist/engine IDs weren't the same thing,
or that there was such variability in configuration between GPUs.

By exposing this information to a client, and giving it explicit control
of which runlist it's allocating a channel on, we're able to make better
choices.

The immediate effect of this is that on GPUs where CE0 is the "GRCE", we
will now be allocating a copy engine running asynchronously to GR for BO
migrations - as intended.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:21 +10:00
Ben Skeggs
55b8e85b0b drm/nouveau/fifo/gk104-: accept engine contexts for CE3 and up
These can exist on GP100 and newer.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:21 +10:00
Ben Skeggs
832ca2ac3c drm/nouveau: pass handle of vmm object to channel allocation ioctls
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2017-11-02 13:32:33 +10:00
Ben Skeggs
01f349fcad drm/nouveau/fifo/gf100-: use new interfaces for vmm operations
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2017-11-02 13:32:31 +10:00
Ben Skeggs
f66c57d922 drm/nouveau/fifo: initialise vmm with new interfaces
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2017-11-02 13:32:30 +10:00
Ben Skeggs
d30af7ce2c drm/nouveau/mmu: handle instance block setup
We previously required each VMM user to allocate their own page directory
and fill in the instance block themselves.

It makes more sense to handle this in a common location.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2017-11-02 13:32:27 +10:00
Ben Skeggs
19a82e492c drm/nouveau/core/memory: change map interface to support upcoming mmu changes
Map flags (access, kind, etc) are currently defined in either the VMA,
or the memory object, which turns out to not be ideal for things like
suballocated buffers, etc.

These will become per-map flags instead, so we need to support passing
these arguments in nvkm_memory_map().

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2017-11-02 13:32:22 +10:00
Ben Skeggs
75d115f2aa drm/nouveau/fifo/gk104-: preempt recovery
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2017-02-17 17:38:16 +10:00
Ben Skeggs
ff9f29abf0 drm/nouveau/fifo/gf100-: provide notification to user if channel is killed
There are instances (such as non-recoverable GPU page faults) where
NVKM decides that a channel's context is no longer viable, and will
be removed from the runlist.

This commit notifies the owner of the channel when this happens, so
it has the opportunity to take some kind of recovery action instead
of hanging.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2017-02-17 17:38:08 +10:00
Ben Skeggs
b27add13f5 drm/nouveau/fifo/gf100-: protect channel preempt with subdev mutex
This avoids an issue that occurs when we're attempting to preempt multiple
channels simultaneously.  HW seems to ignore preempt requests while it's
still processing a previous one, which, well, makes sense.

Fixes random "fifo: SCHED_ERROR 0d []" + GPCCS page faults during parallel
piglit runs on (at least) GM107.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Cc: stable@vger.kernel.org
2016-11-07 14:05:13 +10:00
Ben Skeggs
4a3f63f808 drm/nouveau/fifo/gk104: add vic plumbing
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-03-14 10:13:47 +10:00
Ben Skeggs
a8b005fd52 drm/nouveau/fifo/gk104: add sec plumbing
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-03-14 10:13:46 +10:00
Ben Skeggs
608fd040b7 drm/nouveau/fifo/gk104: add nvdec plumbing
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-03-14 10:13:46 +10:00
Ben Skeggs
9e4fff3205 drm/nouveau/fifo/gk104: add nvenc plumbing
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-03-14 10:13:46 +10:00
Ben Skeggs
5d7fa4de46 drm/nouveau/fifo/gk104: add msenc plumbing
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-03-14 10:13:45 +10:00
Ben Skeggs
1f5ff7f52b drm/nouveau/fifo/gk104: make use of topology info during gpfifo construction
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-03-14 10:13:42 +10:00
Ben Skeggs
41e5171ba8 drm/nouveau/fifo/gk104: read device topology information from hw
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-03-14 10:13:41 +10:00
Ben Skeggs
69aa40e276 drm/nouveau/fifo/gk104: cosmetic engine->runlist changes
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-03-14 10:13:40 +10:00
Alexandre Courbot
2bf1833e51 drm/nouveau/fifo/gk104: kick channel upon removal
A channel may still be processed by the PBDMA even after removal, unless
it is properly kicked. Some chips are more sensible to this than others,
with GM20B triggering the issue very easily (the PBDMA will try to fetch
methods from the previously-removed channel after a new one is added).

Make sure this cannot happen by kicking the channel right after it is
disabled, and before the new runlist is submitted.

Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-03-14 10:13:34 +10:00
Ben Skeggs
f01c4e682c drm/nouveau/nvif: modify nvif_unvers/nvif_unpack macros to be more obvious
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-01-11 11:17:40 +10:00
Ben Skeggs
8ed1730ccd drm/nouveau/nvif: split out fifo interface definitions
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-01-11 11:17:40 +10:00
Ben Skeggs
386ffd5e80 drm/nouveau/fifo/gk104: fix race condition when updating engine runlists
The CPU-side tracking of engine runlists was not protected by a lock,
leading to list corruption, eventually causing runlist_update() to
overrun the GPU-side runlist, triggering an OOPS.

Fixes some of the issues noticed during parallel piglit runs.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-01-11 11:17:40 +10:00
Ben Skeggs
68f3f702b6 drm/nouveau/core: remove the remainder of the previous style
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-08-28 12:40:47 +10:00
Ben Skeggs
13de7f4629 drm/nouveau/fifo: convert to new-style nvkm_engine
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-08-28 12:40:46 +10:00
Ben Skeggs
8f0649b5c6 drm/nouveau/fifo: convert user classes to new-style nvkm_object
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-08-28 12:40:40 +10:00
Ben Skeggs
9a65a38c45 drm/nouveau/fifo: split user classes out from engine implementations
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2015-08-28 12:40:40 +10:00