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Author SHA1 Message Date
Christoph Hellwig
a1fd09e8e6 dma-mapping: move dma-debug.h to kernel/dma/
Most of dma-debug.h is not required by anything outside of kernel/dma.
Move the four declarations needed by dma-mappin.h or dma-ops providers
into dma-mapping.h and dma-map-ops.h, and move the remainder of the
file to kernel/dma/debug.h.

Signed-off-by: Christoph Hellwig <hch@lst.de>
2020-10-06 07:07:05 +02:00
Christoph Hellwig
5db5d93089 dma-mapping: remove <asm/dma-contiguous.h>
Just provide a weak default definition of dma_contiguous_early_fixup and
let arm override it.

Signed-off-by: Christoph Hellwig <hch@lst.de>
2020-10-06 07:07:05 +02:00
Christoph Hellwig
0b1abd1fb7 dma-mapping: merge <linux/dma-contiguous.h> into <linux/dma-map-ops.h>
Merge dma-contiguous.h into dma-map-ops.h, after removing the comment
describing the contiguous allocator into kernel/dma/contigous.c.

Signed-off-by: Christoph Hellwig <hch@lst.de>
2020-10-06 07:07:04 +02:00
Christoph Hellwig
5af638931e dma-contiguous: remove dev_set_cma_area
dev_set_cma_area contains a trivial assignment.  It has just three
callers that all have a non-NULL device and depend on CONFIG_DMA_CMA,
so remove the wrapper.

Signed-off-by: Christoph Hellwig <hch@lst.de>
2020-10-06 07:07:03 +02:00
Christoph Hellwig
8df4051232 dma-contiguous: remove dma_declare_contiguous
dma_declare_contiguous is a trivial wrapper around
dma_contiguous_reserve_area and just has a single caller.

Signed-off-by: Christoph Hellwig <hch@lst.de>
2020-10-06 07:07:03 +02:00
Christoph Hellwig
0a0f0d8be7 dma-mapping: split <linux/dma-mapping.h>
Split out all the bits that are purely for dma_map_ops implementations
and related code into a new <linux/dma-map-ops.h> header so that they
don't get pulled into all the drivers.  That also means the architecture
specific <asm/dma-mapping.h> is not pulled in by <linux/dma-mapping.h>
any more, which leads to a missing includes that were pulled in by the
x86 or arm versions in a few not overly portable drivers.

Signed-off-by: Christoph Hellwig <hch@lst.de>
2020-10-06 07:07:03 +02:00
Randy Dunlap
6364d1b41c arc: include/asm: fix typos of "themselves"
Fix copy/paste spello of "themselves" in 3 places.

Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Cc: Vineet Gupta <vgupta@synopsys.com>
Cc: linux-snps-arc@lists.infradead.org
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2020-10-05 21:02:29 -07:00
Mike Rapoport
937cf85f1d ARC: SMP: fix typo and use "come up" instead of "comeup"
When a secondary CPU fails to come up, there is a missing space in the
log:

	Timeout: CPU1 FAILED to comeup !!!

Fix it.

Signed-off-by: Mike Rapoport <rppt@linux.ibm.com>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2020-10-05 21:02:29 -07:00
Zhen Lei
05b1be68c4 ARC: [dts] fix the errors detected by dtbs_check
xxx/arc/boot/dts/axs101.dt.yaml: dw-apb-ictl@e0012000: $nodename:0: \
'dw-apb-ictl@e0012000' does not match '^interrupt-controller(@[0-9a-f,]+)*$'
 From schema: xxx/interrupt-controller/snps,dw-apb-ictl.yaml

The node name of the interrupt controller must start with
"interrupt-controller" instead of "dw-apb-ictl".

Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2020-10-05 21:02:29 -07:00
Necip Fazil Yildiran
63bcf87cb1 arc: plat-hsdk: fix kconfig dependency warning when !RESET_CONTROLLER
When ARC_SOC_HSDK is enabled and RESET_CONTROLLER is disabled, it results
in the following Kbuild warning:

WARNING: unmet direct dependencies detected for RESET_HSDK
  Depends on [n]: RESET_CONTROLLER [=n] && HAS_IOMEM [=y] && (ARC_SOC_HSDK [=y] || COMPILE_TEST [=n])
  Selected by [y]:
  - ARC_SOC_HSDK [=y] && ISA_ARCV2 [=y]

The reason is that ARC_SOC_HSDK selects RESET_HSDK without depending on or
selecting RESET_CONTROLLER while RESET_HSDK is subordinate to
RESET_CONTROLLER.

Honor the kconfig menu hierarchy to remove kconfig dependency warnings.

Fixes: a528629dfd ("ARC: [plat-hsdk] select CONFIG_RESET_HSDK from Kconfig")
Signed-off-by: Necip Fazil Yildiran <fazilyildiran@gmail.com>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2020-10-05 21:02:29 -07:00
Vineet Gupta
dd7c7ab01a ARC: [plat-eznps]: Drop support for EZChip NPS platform
NPS customers are no longer doing active development, as evident from
rand config build failures reported in recent times, so drop support
for NPS platform.

Tested-by: kernel test robot <lkp@intel.com>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
2020-10-05 21:02:29 -07:00
David S. Miller
8b0308fe31 Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net
Rejecting non-native endian BTF overlapped with the addition
of support for it.

The rest were more simple overlapping changes, except the
renesas ravb binding update, which had to follow a file
move as well as a YAML conversion.

Signed-off-by: David S. Miller <davem@davemloft.net>
2020-10-05 18:40:01 -07:00
Linus Torvalds
165563c050 Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net
Pull networking fixes from David Miller:

 1) Make sure SKB control block is in the proper state during IPSEC
    ESP-in-TCP encapsulation. From Sabrina Dubroca.

 2) Various kinds of attributes were not being cloned properly when we
    build new xfrm_state objects from existing ones. Fix from Antony
    Antony.

 3) Make sure to keep BTF sections, from Tony Ambardar.

 4) TX DMA channels need proper locking in lantiq driver, from Hauke
    Mehrtens.

 5) Honour route MTU during forwarding, always. From Maciej
    Żenczykowski.

 6) Fix races in kTLS which can result in crashes, from Rohit
    Maheshwari.

 7) Skip TCP DSACKs with rediculous sequence ranges, from Priyaranjan
    Jha.

 8) Use correct address family in xfrm state lookups, from Herbert Xu.

 9) A bridge FDB flush should not clear out user managed fdb entries
    with the ext_learn flag set, from Nikolay Aleksandrov.

10) Fix nested locking of netdev address lists, from Taehee Yoo.

11) Fix handling of 32-bit DATA_FIN values in mptcp, from Mat Martineau.

12) Fix r8169 data corruptions on RTL8402 chips, from Heiner Kallweit.

13) Don't free command entries in mlx5 while comp handler could still be
    running, from Eran Ben Elisha.

14) Error flow of request_irq() in mlx5 is busted, due to an off by one
    we try to free and IRQ never allocated. From Maor Gottlieb.

15) Fix leak when dumping netlink policies, from Johannes Berg.

16) Sendpage cannot be performed when a page is a slab page, or the page
    count is < 1. Some subsystems such as nvme were doing so. Create a
    "sendpage_ok()" helper and use it as needed, from Coly Li.

17) Don't leak request socket when using syncookes with mptcp, from
    Paolo Abeni.

* git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net: (111 commits)
  net/core: check length before updating Ethertype in skb_mpls_{push,pop}
  net: mvneta: fix double free of txq->buf
  net_sched: check error pointer in tcf_dump_walker()
  net: team: fix memory leak in __team_options_register
  net: typhoon: Fix a typo Typoon --> Typhoon
  net: hinic: fix DEVLINK build errors
  net: stmmac: Modify configuration method of EEE timers
  tcp: fix syn cookied MPTCP request socket leak
  libceph: use sendpage_ok() in ceph_tcp_sendpage()
  scsi: libiscsi: use sendpage_ok() in iscsi_tcp_segment_map()
  drbd: code cleanup by using sendpage_ok() to check page for kernel_sendpage()
  tcp: use sendpage_ok() to detect misused .sendpage
  nvme-tcp: check page by sendpage_ok() before calling kernel_sendpage()
  net: add WARN_ONCE in kernel_sendpage() for improper zero-copy send
  net: introduce helper sendpage_ok() in include/linux/net.h
  net: usb: pegasus: Proper error handing when setting pegasus' MAC address
  net: core: document two new elements of struct net_device
  netlink: fix policy dump leak
  net/mlx5e: Fix race condition on nhe->n pointer in neigh update
  net/mlx5e: Fix VLAN create flow
  ...
2020-10-05 11:27:14 -07:00
Mark Rutland
353e228eb3 arm64: initialize per-cpu offsets earlier
The current initialization of the per-cpu offset register is difficult
to follow and this initialization is not always early enough for
upcoming instrumentation with KCSAN, where the instrumentation callbacks
use the per-cpu offset.

To make it possible to support KCSAN, and to simplify reasoning about
early bringup code, let's initialize the per-cpu offset earlier, before
we run any C code that may consume it. To do so, this patch adds a new
init_this_cpu_offset() helper that's called before the usual
primary/secondary start functions. For consistency, this is also used to
re-initialize the per-cpu offset after the runtime per-cpu areas have
been allocated (which can change CPU0's offset).

So that init_this_cpu_offset() isn't subject to any instrumentation that
might consume the per-cpu offset, it is marked with noinstr, preventing
instrumentation.

Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: James Morse <james.morse@arm.com>
Cc: Will Deacon <will@kernel.org>
Link: https://lore.kernel.org/r/20201005164303.21389-1-mark.rutland@arm.com
Signed-off-by: Will Deacon <will@kernel.org>
2020-10-05 18:54:49 +01:00
Martin Blumenstingl
1fdc97ae45 arm64: dts: amlogic: meson-g12: use the G12A specific dwmac compatible
We have a dedicated "amlogic,meson-g12a-dwmac" compatible string for the
Ethernet controller since commit 3efdb92426 ("dt-bindings: net:
dwmac-meson: Add a compatible string for G12A onwards").
Using the AXG compatible string worked fine so far because the
dwmac-meson8b driver doesn't handle the newly introduced register bits
for G12A. However, once that changes the driver must be probed with the
correct compatible string to manage these new register bits.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/20200925211743.537496-1-martin.blumenstingl@googlemail.com
2020-10-05 10:40:34 -07:00
Scott K Logan
a1afbbb028 arm64: dts: meson: add missing g12 rng clock
This adds the missing perpheral clock for the RNG for Amlogic G12. As
stated in amlogic,meson-rng.yaml, this isn't always necessary for the
RNG to function, but is better to have in case the clock is disabled for
some reason prior to loading.

Signed-off-by: Scott K Logan <logans@cottsay.net>
Suggested-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Link: https://lore.kernel.org/r/520a1a8ec7a958b3d918d89563ec7e93a4100a45.camel@cottsay.net
2020-10-05 10:40:23 -07:00
Neil Armstrong
f450d2c219 arm64: dts: meson-axg-s400: enable USB OTG
This enables USB OTG on the S400 board.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2020-10-05 10:40:05 -07:00
Neil Armstrong
1b208bab34 arm64: dts: meson-axg: add USB nodes
This adds the USB Glue node, with the USB2 & USB3 controllers along the single
USB2 PHY node.

Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Reviewed-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
2020-10-05 10:39:46 -07:00
Greg Ungerer
322c512f47 m68knommu: include SDHC support only when hardware has it
The mere fact that the kernel has the MMC subsystem enabled (CONFIG_MMC
enabled) does not mean that the underlying hardware platform has the
SDHC hardware present. Within the ColdFire hardware defines that is
signified by MCFSDHC_BASE being defined with an address.

The platform data for the ColdFire parts is including the SDHC hardware
if CONFIG_MMC is enabled, instead of MCFSDHC_BASE. This means that if
you are compiling for a ColdFire target that does not support SDHC but
enable CONFIG_MMC you will fail to compile with errors like this:

    arch/m68k/coldfire/device.c:565:12: error: ‘MCFSDHC_BASE’ undeclared here (not in a function)
       .start = MCFSDHC_BASE,
            ^
    arch/m68k/coldfire/device.c:566:25: error: ‘MCFSDHC_SIZE’ undeclared here (not in a function)
       .end = MCFSDHC_BASE + MCFSDHC_SIZE - 1,
                         ^
    arch/m68k/coldfire/device.c:569:12: error: ‘MCF_IRQ_SDHC’ undeclared here (not in a function)
       .start = MCF_IRQ_SDHC,
            ^

Make the SDHC platform support depend on MCFSDHC_BASE, that is only
include it if the specific ColdFire SoC has that hardware module.

Fixes: 991f5c4dd2 ("m68k: mcf5441x: add support for esdhc mmc controller")
Signed-off-by: Greg Ungerer <gerg@linux-m68k.org>
Reviewed-by: Geert Uytterhoeven <geert@linux-m68k.org>
Reviewed-by: Angelo Dureghello <angelo.dureghello@timesys.com>
Tested-by: Angelo Dureghello <angelo.dureghello@timesys.com>
2020-10-05 21:51:31 +10:00
Greg Ungerer
006967471c m68knommu: fix sparse warnings in signal code
Commit 858b810bf63f ("m68knommu: switch to using asm-generic/uaccess.h")
cleaned up a number of sparse warnings associated with lack of __user
annotations. It also uncovered a couple of more in the signal handling
code:

arch/m68k/kernel/signal.c:923:16:    expected char [noderef] __user *__x
arch/m68k/kernel/signal.c:923:16:    got void *
arch/m68k/kernel/signal.c:1007:16: warning: incorrect type in initializer (different address spaces)
arch/m68k/kernel/signal.c:1007:16:    expected char [noderef] __user *__x
arch/m68k/kernel/signal.c:1007:16:    got void *
arch/m68k/kernel/signal.c:1132:6: warning: symbol 'do_notify_resume' was not declared. Should it be static?

These are specific to a non-MMU configuration. Fix these inserting the
correct __user annotations as required.

Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Greg Ungerer <gerg@linux-m68k.org>
2020-10-05 21:51:31 +10:00
Greg Ungerer
a27bc11f4b m68knommu: switch to using asm-generic/uaccess.h
Switch to using the asm-generic/uaccess functions for non-MMU builds.
Remove all the m68knommu local specific uaccess defines and macros.

There is nothing so special about the m68knommu targets that they cannot
use all of the asm-generic uaccess support. Using the asm-generic
uaccess definitions also resolves some of the existing problems with
missing __user annotations in the m68knommu specific functions.

The elimination of all of the contents of uaccess_no.h means we can fold
the uaccess_mm.h back into uaccess.h - and just have the single file
now.

The resulting generated code ends up being slightly smaller (by a few
hundred bytes) due to the compilers ability to better optimize load
and stores without forcing its hand with asm statements.

Specifically trivial cases like this contrived example:

    get_user(x, ptr);
    x++;
    put_user(x, ptr);

end up now being optimized to a single instruction on m68k. More
generally the compiler can avoid using a temporary register in many
cases as well.

Reported-by: kernel test robot <lkp@intel.com>
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Greg Ungerer <gerg@linux-m68k.org>
2020-10-05 21:51:31 +10:00
Rafael J. Wysocki
757e282188 Merge branch 'opp/linux-next' of git://git.kernel.org/pub/scm/linux/kernel/git/vireshk/pm
Pull opertaing performance points (OPP) framework fixes for 5.10-rc1
from Viresh Kumar:

"- Return -EPROBE_DEFER properly from dev_pm_opp_get_opp_table()
   (Stephan Gerhold).

 - Minor cleanups around required-opps (Stephan Gerhold).

 - Extends opp-supported-hw property to contain multiple versions
   (Viresh Kumar).

 - Multiple cleanups around dev_pm_opp_attach_genpd() (Viresh Kumar).

 - Multiple fixes, cleanups in the OPP core for overall better design
   (Viresh Kumar)."

* 'opp/linux-next' of git://git.kernel.org/pub/scm/linux/kernel/git/vireshk/pm:
  opp: Allow opp-level to be set to 0
  opp: Prevent memory leak in dev_pm_opp_attach_genpd()
  ARM: tegra: Pass multiple versions in opp-supported-hw property
  opp: Allow opp-supported-hw to contain multiple versions
  dt-bindings: opp: Allow opp-supported-hw to contain multiple versions
  opp: Set required OPPs in reverse order when scaling down
  opp: Reduce code duplication in _set_required_opps()
  opp: Drop unnecessary check from dev_pm_opp_attach_genpd()
  opp: Handle multiple calls for same OPP table in _of_add_opp_table_v1()
  opp: Allow dev_pm_opp_get_opp_table() to return -EPROBE_DEFER
  opp: Remove _dev_pm_opp_find_and_remove_table() wrapper
  opp: Split out _opp_set_rate_zero()
  opp: Reuse the enabled flag in !target_freq path
  opp: Rename regulator_enabled and use it as status of all resources
2020-10-05 13:31:32 +02:00
Rafael J. Wysocki
fccd2f0e62 Merge back cpufreq material for 5.10. 2020-10-05 13:12:02 +02:00
Clément Péron
dea252fa41
ARM: dts: sun4i-a10: fix cpu_alert temperature
When running dtbs_check thermal_zone warn about the
temperature declared.

thermal-zones: cpu-thermal:trips:cpu-alert0:temperature:0:0: 850000 is greater than the maximum of 200000

It's indeed wrong the real value is 85°C and not 850°C.

Signed-off-by: Clément Péron <peron.clem@gmail.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20201003100332.431178-1-peron.clem@gmail.com
2020-10-05 11:36:58 +02:00
Lorenzo Pieralisi
1d29b36ac7 sparc32: Move ioremap/iounmap declaration before asm-generic/io.h include
Move the ioremap/iounmap declaration before asm-generic/io.h is
included so that it is visible within it.

Link: https://lore.kernel.org/r/93e2f23cda474a92a4708d4c50c9c359426a2162.1600254147.git.lorenzo.pieralisi@arm.com
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: "David S. Miller" <davem@davemloft.net>
Cc: "David S. Miller" <davem@davemloft.net>
2020-10-05 09:44:41 +01:00
Lorenzo Pieralisi
333a678399 sparc32: Remove useless io_32.h __KERNEL__ preprocessor guard
The __KERNEL_ preprocessor guard is useless in non-uapi headers.

Remove it.

Link: https://lore.kernel.org/r/084753d3064fe946ff1963eda2eb425cfd7daa7b.1600254147.git.lorenzo.pieralisi@arm.com
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: David S. Miller <davem@davemloft.net>
Cc: David S. Miller <davem@davemloft.net>
2020-10-05 09:44:16 +01:00
Greg Kroah-Hartman
168ae5a74b Merge 5.9-rc8 into usb-next
We need the USB fixes in here as well for testing.

Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-10-05 08:54:36 +02:00
Hui Su
32118f97f4 x86/xen: Fix typo in xen_pagetable_p2m_free()
Fix typo in xen_pagetable_p2m_free(): s/Fortunatly/Fortunately

Signed-off-by: Hui Su <sh_def@163.com>
Link: https://lore.kernel.org/r/20200927172836.GA7423@rlk

[boris: reword commit message slightly]
Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
2020-10-04 18:41:34 -05:00
Juergen Gross
d759af3857 x86/xen: disable Firmware First mode for correctable memory errors
When running as Xen dom0 the kernel isn't responsible for selecting the
error handling mode, this should be handled by the hypervisor.

So disable setting FF mode when running as Xen pv guest. Not doing so
might result in boot splats like:

[    7.509696] HEST: Enabling Firmware First mode for corrected errors.
[    7.510382] mce: [Firmware Bug]: Ignoring request to disable invalid MCA bank 2.
[    7.510383] mce: [Firmware Bug]: Ignoring request to disable invalid MCA bank 3.
[    7.510384] mce: [Firmware Bug]: Ignoring request to disable invalid MCA bank 4.
[    7.510384] mce: [Firmware Bug]: Ignoring request to disable invalid MCA bank 5.
[    7.510385] mce: [Firmware Bug]: Ignoring request to disable invalid MCA bank 6.
[    7.510386] mce: [Firmware Bug]: Ignoring request to disable invalid MCA bank 7.
[    7.510386] mce: [Firmware Bug]: Ignoring request to disable invalid MCA bank 8.

Reason is that the HEST ACPI table contains the real number of MCA
banks, while the hypervisor is emulating only 2 banks for guests.

Cc: stable@vger.kernel.org
Signed-off-by: Juergen Gross <jgross@suse.com>
Reviewed-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Link: https://lore.kernel.org/r/20200925140751.31381-1-jgross@suse.com
Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
2020-10-04 18:41:34 -05:00
Stefano Stabellini
f88af7229f xen/arm: do not setup the runstate info page if kpti is enabled
The VCPUOP_register_runstate_memory_area hypercall takes a virtual
address of a buffer as a parameter. The semantics of the hypercall are
such that the virtual address should always be valid.

When KPTI is enabled and we are running userspace code, the virtual
address is not valid, thus, Linux is violating the semantics of
VCPUOP_register_runstate_memory_area.

Do not call VCPUOP_register_runstate_memory_area when KPTI is enabled.

Signed-off-by: Stefano Stabellini <stefano.stabellini@xilinx.com>
CC: Bertrand Marquis <Bertrand.Marquis@arm.com>
CC: boris.ostrovsky@oracle.com
CC: jgross@suse.com
Link: https://lore.kernel.org/r/20200924234955.15455-1-sstabellini@kernel.org
Reviewed-by: Bertrand Marquis <bertrand.marquis@arm.com>
Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
2020-10-04 18:41:33 -05:00
Atish Patra
a78c6f5956
RISC-V: Make sure memblock reserves the memory containing DT
Currently, the memory containing DT is not reserved. Thus, that region
of memory can be reallocated or reused for other purposes. This may result
in  corrupted DT for nommu virt board in Qemu. We may not face any issue
in kendryte as DT is embedded in the kernel image for that.

Fixes: 6bd33e1ece ("riscv: add nommu support")
Cc: stable@vger.kernel.org
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
2020-10-04 16:19:28 -07:00
Christoph Hellwig
e8d444d3e9
riscv: remove address space overrides using set_fs()
Stop providing the possibility to override the address space using
set_fs() now that there is no need for that any more.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
2020-10-04 10:27:10 -07:00
Christoph Hellwig
d464118cdc
riscv: implement __get_kernel_nofault and __put_user_nofault
Implement the non-faulting kernel access helpers directly instead of
abusing the uaccess routines under set_fs(KERNEL_DS).

Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
2020-10-04 10:27:09 -07:00
Christoph Hellwig
f289a34811
riscv: refactor __get_user and __put_user
Add new __get_user_nocheck and __put_user_nocheck that switch on the size
and call the actual inline assembly helpers, and move the uaccess enable
/ disable into the actual __get_user and __put_user.  This prepares for
natively implementing __get_kernel_nofault and __put_kernel_nofault.

Also don't bother with the deprecated register keyword for the error
return.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
2020-10-04 10:27:08 -07:00
Christoph Hellwig
11129e8ed4
riscv: use memcpy based uaccess for nommu again
This reverts commit adccfb1a80.

Now that the generic uaccess by mempcy code handles unaligned addresses
the generic code can be used for all RISC-V CPUs.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>
2020-10-04 10:27:07 -07:00
Palmer Dabbelt
eee4e23099
Merge branch 'base.set_fs' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs into for-next
This is a dependency for Christoph's removal of set_fs.

* 'base.set_fs' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/viro/vfs:
  powerpc: remove address space overrides using set_fs()
  powerpc: use non-set_fs based maccess routines
  x86: remove address space overrides using set_fs()
  x86: make TASK_SIZE_MAX usable from assembly code
  x86: move PAGE_OFFSET, TASK_SIZE & friends to page_{32,64}_types.h
  lkdtm: remove set_fs-based tests
  test_bitmap: remove user bitmap tests
  uaccess: add infrastructure for kernel builds with set_fs()
  fs: don't allow splice read/write without explicit ops
  fs: don't allow kernel reads and writes without iter ops
  sysctl: Convert to iter interfaces
  proc: add a read_iter method to proc proc_ops
  proc: cleanup the compat vs no compat file ops
  proc: remove a level of indentation in proc_get_inode
2020-10-04 10:14:53 -07:00
Vladimir Oltean
e69eb0824d powerpc: dts: t1040rdb: add ports for Seville Ethernet switch
Define the network interface names for the switch ports and hook them up
to the 2 QSGMII PHYs that are onboard.

A conscious decision was taken to go along with the numbers that are
written on the front panel of the board and not with the hardware
numbers of the switch chip ports.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Maxim Kochetkov <fido_max@inbox.ru>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
2020-10-03 17:02:42 -07:00
Vladimir Oltean
aa3098676c powerpc: dts: t1040: add bindings for Seville Ethernet switch
Add the description of the embedded L2 switch inside the SoC dtsi file
for NXP T1040.

Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Reviewed-by: Maxim Kochetkov <fido_max@inbox.ru>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
2020-10-03 17:02:42 -07:00
Olof Johansson
098bfcec1b Visconti5 SoC changes for v5.10 (take two)
- Add dt-bindings for Toshiba Visconti ARM SoCs
 - Add dt-bindings for the TMPV7708 RM main board
 - Add initial support for Toshiba Visconti platform
 - Add device tree for TMPV7708 RM main board
 - Add information for Toshiba Visconti ARM SoCs to MAINTAINERS
 - Enable configs for Toshiba Visconti to arm64's defconfig
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Merge tag 'visconti-initial-for-5.10-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/iwamatsu/linux-visconti into arm/dt

Visconti5 SoC changes for v5.10 (take two)

- Add dt-bindings for Toshiba Visconti ARM SoCs
- Add dt-bindings for the TMPV7708 RM main board
- Add initial support for Toshiba Visconti platform
- Add device tree for TMPV7708 RM main board
- Add information for Toshiba Visconti ARM SoCs to MAINTAINERS
- Enable configs for Toshiba Visconti to arm64's defconfig

* tag 'visconti-initial-for-5.10-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/iwamatsu/linux-visconti:
  arm64: defconfig: Enable configs for Toshiba Visconti
  MAINTAINERS: Add information for Toshiba Visconti ARM SoCs
  arm64: dts: visconti: Add device tree for TMPV7708 RM main board
  arm64: visconti: Add initial support for Toshiba Visconti platform
  dt-bindings: arm: toshiba: Add the TMPV7708 RM main board
  dt-bindings: arm: toshiba: add Toshiba Visconti ARM SoCs

Link: https://lore.kernel.org/r/20200923085236.4hu53gmnnmqkttuy@toshiba.co.jp
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-10-03 13:21:26 -07:00
Olof Johansson
4550e2c8d3 Qualcomm ARM64defconfig updates for v5.10
Enable Qualcomm related drivers for Lontium LT9611 HDMI bridge, SNPS
 high-speed USB PHY, various Interconnect providers, GPU clock
 controllers for SM8150 and SM8250 and audio driver for MSM8996 and
 APQ8016.
 
 Then enable ACM and FTDI host drivers, which are useful when working
 with various development boards using ARM64 hosts.
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Merge tag 'qcom-arm64-defconfig-for-5.10' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/defconfig

Qualcomm ARM64defconfig updates for v5.10

Enable Qualcomm related drivers for Lontium LT9611 HDMI bridge, SNPS
high-speed USB PHY, various Interconnect providers, GPU clock
controllers for SM8150 and SM8250 and audio driver for MSM8996 and
APQ8016.

Then enable ACM and FTDI host drivers, which are useful when working
with various development boards using ARM64 hosts.

* tag 'qcom-arm64-defconfig-for-5.10' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
  arm64: defconfig: enable Qualcomm ASoC modules
  arm64: defconfig: qcom: enable GPU clock controller for SM8[12]50
  arm64: defconfig: enable INTERCONNECT for Qualcomm chipsets
  arm64: defconfig: Enable Qcom SNPS Femto PHY
  arm64: defconfig: Enable Lontium LT9611 driver
  arm64: defcondfig: Enable USB ACM and FTDI drivers

Link: https://lore.kernel.org/r/20200924040708.180352-1-bjorn.andersson@linaro.org
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-10-03 13:19:47 -07:00
Olof Johansson
017fc1516e i.MX defconfig update for 5.10:
- Enable i.MX6SLL, i.MX7ULP SoC and CAAM crypto driver support in
   multi_v7_defconfig.
 - Enable the eLCDIF and Raydium RM67191 driver in arm64 defconfig to
   support MIPI DSI on imx8mq-evk.
 - Enable NWL DSI host controller, dphy and SITRONIX ST7703 panel driver
   in arm64 defconfig to support display on imx8mq-librem5-devkit.
 - Enable sl28cpld board management controller driver support in arm64
   defconfig.
 - Enable i.MX8M SoCs support in imx_v6_v7_defconfig as they can run in
   AArch32 mode.
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Merge tag 'imx-defconfig-5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/defconfig

i.MX defconfig update for 5.10:

- Enable i.MX6SLL, i.MX7ULP SoC and CAAM crypto driver support in
  multi_v7_defconfig.
- Enable the eLCDIF and Raydium RM67191 driver in arm64 defconfig to
  support MIPI DSI on imx8mq-evk.
- Enable NWL DSI host controller, dphy and SITRONIX ST7703 panel driver
  in arm64 defconfig to support display on imx8mq-librem5-devkit.
- Enable sl28cpld board management controller driver support in arm64
  defconfig.
- Enable i.MX8M SoCs support in imx_v6_v7_defconfig as they can run in
  AArch32 mode.

* tag 'imx-defconfig-5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  arm64: defconfig: enable the sl28cpld board management controller
  arm64: defconfig: Enable the eLCDIF and Raydium RM67191 drivers
  arm64: defconfig: Enable imx8mq-librem5-devkit display stack
  arm64: defconfig: re-sync DRM related defconfig bits
  ARM: imx_v6_v7_defconfig: Support i.MX8MN/P/Q
  ARM: multi_v7_defconfig: Enable i.MX7ULP SoC
  ARM: multi_v7_defconfig: Enable i.MX6SLL SoC
  ARM: multi_v7_defconfig: enable caam crypto module

Link: https://lore.kernel.org/r/20200923073009.23678-6-shawnguo@kernel.org
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-10-03 13:18:19 -07:00
Olof Johansson
accdab6d9e i.MX SoC update for 5.10:
- A series from Fabio Estevam to remove legacy non-DT i.MX platforms
   support and related board files. This is a natural move, as the
   platforms had been converted to DT for years, and we have not seen
   any users around these legacy non-DT support for a while.
 - Enable cpufreq support for i.MX7ULP platform.
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Merge tag 'imx-soc-5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/soc

i.MX SoC update for 5.10:

- A series from Fabio Estevam to remove legacy non-DT i.MX platforms
  support and related board files. This is a natural move, as the
  platforms had been converted to DT for years, and we have not seen
  any users around these legacy non-DT support for a while.
- Enable cpufreq support for i.MX7ULP platform.

* tag 'imx-soc-5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (26 commits)
  clk: imx: imx35: Remove mx35_clocks_init()
  clk: imx: imx31: Remove mx31_clocks_init()
  clk: imx: imx27: Remove mx27_clocks_init()
  ARM: imx: Remove unused definitions
  ARM: imx35: Retrieve the IIM base address from devicetree
  ARM: imx3: Retrieve the AVIC base address from devicetree
  ARM: imx3: Retrieve the CCM base address from devicetree
  ARM: imx31: Retrieve the IIM base address from devicetree
  ARM: imx27: Retrieve the CCM base address from devicetree
  ARM: imx27: Retrieve the SYSCTRL base address from devicetree
  ARM: imx: Remove remnant board file support pieces
  ARM: imx: Remove imx device directory
  ARM: imx: Remove iomux-v3 board code
  ARM: imx3: Remove imx3 soc_init()
  ARM: imx31: Remove remaining i.MX31 board code
  ARM: imx27: Retrieve AVIC base address from devicetree
  ARM: imx27: Get rid of mm-imx27.c
  ARM: imx27: Remove iomux-v1 board code
  ARM: imx27: Remove imx27_soc_init()
  ARM: imx7ulp: enable cpufreq
  ...

Link: https://lore.kernel.org/r/20200923073009.23678-2-shawnguo@kernel.org
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-10-03 13:16:50 -07:00
Olof Johansson
a4f07008bf Hisilicon ARM SoC updates for v5.10
- Add SD5203 SoC support which core is ARM926EJ-S
 - Add Low-level debugging support for SD5203
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Merge tag 'hisi-arm-soc-for-5.10' of git://github.com/hisilicon/linux-hisi into arm/soc

Hisilicon ARM SoC updates for v5.10

- Add SD5203 SoC support which core is ARM926EJ-S
- Add Low-level debugging support for SD5203

* tag 'hisi-arm-soc-for-5.10' of git://github.com/hisilicon/linux-hisi:
  ARM: debug: add UART early console support for SD5203
  ARM: hisi: add support for SD5203 SoC

Link: https://lore.kernel.org/r/5F742928.2060202@hisilicon.com
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-10-03 13:15:40 -07:00
Olof Johansson
e3a2e20297 Defconfig changes for omaps for v5.10 merge window
Enable twl4030_madc as a loadable module as the ADC is used
 on some devices by the battery charger. And enable more widely
 used networking options as loadable modules where possible.
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Merge tag 'omap-for-v5.10/defconfig-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/defconfig

Defconfig changes for omaps for v5.10 merge window

Enable twl4030_madc as a loadable module as the ADC is used
on some devices by the battery charger. And enable more widely
used networking options as loadable modules where possible.

* tag 'omap-for-v5.10/defconfig-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: omap2plus_defconfig: enable generic net options
  ARM: omap2plus_defconfig: enable twl4030_madc as a loadable module

Link: https://lore.kernel.org/r/pull-1601445968-476435@atomide.com-3
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-10-03 13:15:22 -07:00
Olof Johansson
025565212d One more SoC change for omaps for v5.10 merge window
Remove debugfs dependency for enabling off mode during idle
 for omap3 by enabling it automatically based on the PMIC
 configuration.
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Merge tag 'omap-for-v5.10/soc-part2-v2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/soc

One more SoC change for omaps for v5.10 merge window

Remove debugfs dependency for enabling off mode during idle
for omap3 by enabling it automatically based on the PMIC
configuration.

* tag 'omap-for-v5.10/soc-part2-v2-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  ARM: omap3: enable off mode automatically

Link: https://lore.kernel.org/r/pull-1601445968-476435@atomide.com
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-10-03 13:15:05 -07:00
Olof Johansson
1d004afe5f This pull request contains a patch that shifts to using new simplified
i2c driver probe method inside mach-davinci (i2c_driver->probe_new())
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Merge tag 'davinci-for-v5.10/soc' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci into arm/soc

This pull request contains a patch that shifts to using new simplified
i2c driver probe method inside mach-davinci (i2c_driver->probe_new())

* tag 'davinci-for-v5.10/soc' of git://git.kernel.org/pub/scm/linux/kernel/git/nsekhar/linux-davinci:
  ARM: davinci: use simple i2c probe function

Link: https://lore.kernel.org/r/83eff002-5247-4fb6-33b4-ce7cec3d2d5c@ti.com
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-10-03 13:14:15 -07:00
Andre Przywara
e916bfacf5 ARM: dts: nspire: Fix SP804 users
Even though the SP804 binding allows to specify only one clock, the
primecell driver requires a named clock to activate the bus clock.

Specify the one clock three times and provide some clock-names, to
make the DT match the SP804 and primecell binding.

Link: https://lore.kernel.org/r/20200907121831.242281-3-andre.przywara@arm.com
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-10-03 12:56:56 -07:00
Andre Przywara
c9794866ac arm64: dts: lg: Fix SP804 users
Even though the SP804 binding allows to specify only one clock, the
primecell driver requires a named clock to activate the bus clock.

Specify the one clock three times and provide some clock-names, to
make the DT match the SP804 and primecell binding.
Also add the missing arm,primecell compatible string.

Link: https://lore.kernel.org/r/20200907121831.242281-4-andre.przywara@arm.com
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-10-03 12:56:46 -07:00
Andre Przywara
fc772314a3 arm64: dts: lg: Fix SP805 clocks
The SP805 DT binding requires two clocks to be specified, but the two
LG platform DTs currently only specify one clock.

In practice, Linux would pick a clock named "apb_pclk" for the bus
clock, and the Linux (and U-Boot) SP805 driver would use the first clock
to derive the actual watchdog counter frequency.

Since currently both are the very same clock, we can just double the
clock reference, and add the correct clock-names, to match the binding.

Link: https://lore.kernel.org/r/20200907121831.242281-6-andre.przywara@arm.com
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Chanho Min <chanho.min@lge.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-10-03 12:56:03 -07:00
Daniel Palmer
f6320e326f ARM: mstar: Fix up the fallout from moving the dts/dtsi files
Since the dtsi/dts files have been moved some includes are now
broken so this fixes up the includes so the dtbs build again.

Link: https://lore.kernel.org/r/20201002133418.2250277-6-daniel@0x0f.com
Signed-off-by: Daniel Palmer <daniel@0x0f.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
2020-10-03 12:48:25 -07:00