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62 commits

Author SHA1 Message Date
Fabrice Gasnier
f0b638a7f6 iio: adc: stm32: add support for lptimer triggers
STM32 ADC supports hardware triggers like STM32 Low-Power Timer.
For instance, STM32H7 ADC may be triggered by instances 1, 2 or 3.
Add hardware triggered mode so Low-Power Timer Trigger driver can
validate device.

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Acked-by: Jonathan Cameron <jic23@kernel.org>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2017-09-04 14:49:34 +01:00
Jonathan Cameron
52b31bcc93 iio:adc: drop assign iio_info.driver_module and iio_trigger_ops.owner
The equivalent of both of these are now done via macro magic when
the relevant register calls are made.  The actual structure
elements will shortly go away.

Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Lars-Peter Clausen <lars@metafoo.de>
2017-08-22 21:22:25 +01:00
Fabrice Gasnier
ee2ac1cdd3 iio: adc: stm32: add optional st,min-sample-time-nsecs
STM32 ADC allows each channel to be sampled with a different sampling time,
by setting SMPR registers. Basically, value depends on local electrical
properties. Selecting correct value for sampling time highly depends on
analog source impedance. There is a manual that may help in this process:
'How to get the best ADC accuracy in STM32...'

This patch allows to configure minimum sampling time via device tree,
either for:
- all channels at once:
  st,min-sample-time-nsecs = <10000>;

- independently for each channel (must match "st,adc-channels" list):
  st,adc-channels = <0 1>;
  st,min-sample-time-nsecs = <5000 10000>;

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2017-08-09 14:14:10 +01:00
Fabrice Gasnier
95e339b6e8 iio: adc: stm32: add support for STM32H7
Add support for STM32H7 Analog to Digital Converter. It has up
to 20 external channels, resolution ranges from 8 to 16bits.
Either bus or asynchronous adc clock may be used.

Add registers & bitfields definition. Also add new configuration
options to enter/exit powerdown and perform self-calibration.

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2017-06-11 15:07:29 +01:00
Fabrice Gasnier
204a6a25db iio: adc: stm32: make per instance bus clock optional
STM32F4 requires one clock per ADC instance for register access. But,
newer version of ADC hardware block have common bus clock for all
instances (per instance driver isn't responsible for getting it).
So, make it optional by default. Still, enforce it's required on STM32F4.

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2017-06-11 15:07:26 +01:00
Fabrice Gasnier
64ad7f6438 iio: adc: stm32: introduce compatible data cfg
Prepare support for stm32h7 adc variant by introducing compatible
configuration data.
Move STM32F4 specific stuff to compatible data structure:
- registers & bit fields
- input channels data
- start/stop procedures
- trigger definitions

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2017-06-11 15:07:25 +01:00
Fabrice Gasnier
25a85bed36 iio: adc: stm32: add dt option to set resolution
stm32 adc supports several resolution. Add 'assigned-resolution-bits'
dt optional property to set it. Default to maximum resolution in case
it isn't set.

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2017-04-03 20:46:01 +01:00
Fabrice Gasnier
2763ea0585 iio: adc: stm32: add optional dma support
Add DMA optional support to STM32 ADC, as there is a limited number DMA
channels (request lines) that can be assigned to ADC. This way, driver
may fall back using interrupts when all DMA channels are in use for
other IPs.
Use dma cyclic mode with two periods. Allow to tune period length by
using watermark. Coherent memory is used for dma (max buffer size is
fixed to PAGE_SIZE).

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2017-01-29 12:49:17 +00:00
Fabrice Gasnier
732f2dc468 iio: adc: stm32: add trigger polarity extended attribute
Define extended attribute so that user may choose rising, falling or both
edges for external trigger sources.
Default to rising edge in case it isn't set.

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2017-01-28 18:24:57 +00:00
Fabrice Gasnier
f24a33b3e2 iio: adc: stm32: Enable use of stm32 timer triggers
STM32 ADC has external timer trigger sources. Use stm32 timer triggers
API (e.g. is_stm32_timer_trigger()) with local ADC lookup table to
validate a trigger can be used.
This also provides correct trigger selection value (e.g. extsel).

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2017-01-28 18:24:12 +00:00
Fabrice Gasnier
da9b948514 iio: adc: stm32: add support for triggered buffer mode
STM32 ADC conversions can be launched using hardware triggers.
It can be used to start conversion sequences (group of channels).
Selected channels are select via sequence registers.
Trigger source is selected via 'extsel' (external trigger mux).
Trigger polarity is set to rising edge by default.

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2017-01-28 18:23:46 +00:00
Fabrice Gasnier
0f883b223a iio: adc: Add support for STM32 ADC
This patch adds support for STMicroelectronics STM32 MCU's analog to
digital converter.

Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
2016-11-19 12:18:33 +00:00