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5 commits

Author SHA1 Message Date
James Zhu
fa40a00900 drm/amdgpu/jpeg3.0: remove extra asic type check
jpeg ip block is already selected based on ASIC type during set_ip_blocks.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-08-06 16:30:03 -04:00
James Zhu
450da2ef41 drm/amdgpu: fix unused variable
SOC15_WAIT_ON_RREG's return value needn't always been handled by
caller. new design is to fix this kind of unused variable.

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reported-by: kernel test robot <lkp@intel.com>
Acked-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01 01:59:24 -04:00
James Zhu
df3183b37a drm/amdgpu: fix typo for vcn3/jpeg3 idle check
fix typo for vcn3/jpeg3 idle check

Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01 01:59:11 -04:00
Leo Liu
b52e271e15 drm/amdgpu: add Sienna_Cichlid JPEG PG and CG support
This is for static powergating and clockgating

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: James Zhu <James.Zhu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01 01:59:09 -04:00
Leo Liu
dfd57dbf44 drm/amdgpu: add JPEG3.0 support for Sienna_Cichlid
With basic IP block functions and ring functions

Signed-off-by: Leo Liu <leo.liu@amd.com>
Reviewed-by: James Zhu <James.Zhu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-07-01 01:59:09 -04:00