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19 commits

Author SHA1 Message Date
Ben Skeggs
d4115d17cd drm/nouveau/disp/hda/gf119-: add HAL for programming device entry in SF
Register has moved on GV100.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2020-05-22 11:13:51 +10:00
Ben Skeggs
9fe4e17704 drm/nouveau/disp/nv50-: fetch mask of available sors during oneinit
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:20 +10:00
Ben Skeggs
7df1bb87b8 drm/nouveau/disp/nv50-: avoid creating ORs that aren't present on HW
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2017-06-17 11:23:44 +10:00
Ben Skeggs
8d7ef84d90 drm/nouveau/disp/nv50-: implement a common supervisor 2.2
This makes use of all the additional routing and state added in previous
commits, making it possible to deal with GM20x macro link routing, while
also sharing code between the NV50 and GF119 implementations.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2017-06-16 14:05:00 +10:00
Ben Skeggs
3c66c87dc9 drm/nouveau/disp: remove hw-specific customisation of output paths
All of the necessary hw-specific logic is now handled at the output
resource level, so all of this can go away.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2017-06-16 14:04:57 +10:00
Ben Skeggs
e8ccc96dd5 drm/nouveau/disp/gf119-: port OR DP VCPI control to nvkm_ior
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2017-06-16 14:04:57 +10:00
Ben Skeggs
409b9e5472 drm/nouveau/disp/gt215-: port HDA ELD controls to nvkm_ior
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2017-06-16 14:04:56 +10:00
Ben Skeggs
7d1fede03c drm/nouveau/disp/g94-: port OR DP drive setting control to nvkm_ior
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2017-06-16 14:04:56 +10:00
Ben Skeggs
a1de2b522f drm/nouveau/disp/g94-: port OR DP training pattern control to nvkm_ior
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2017-06-16 14:04:56 +10:00
Ben Skeggs
a3e81117ce drm/nouveau/disp/g94-: port OR DP link power control to nvkm_ior
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2017-06-16 14:04:55 +10:00
Ben Skeggs
7dc0bac4aa drm/nouveau/disp/g94-: port OR DP link setup to nvkm_ior
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2017-06-16 14:04:55 +10:00
Ben Skeggs
333781045d drm/nouveau/disp/g94-: port OR DP lane mapping to nvkm_ior
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2017-06-16 14:04:54 +10:00
Ben Skeggs
797b2fb81b drm/nouveau/disp/g84-: port OR HDMI control to nvkm_ior
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2017-06-16 14:04:54 +10:00
Ben Skeggs
9c5753bc70 drm/nouveau/disp/nv50-: port OR power state control to nvkm_ior
Also removes the user-facing methods to these controls, as they're not
currently utilised by the DD anyway.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2017-06-16 14:04:53 +10:00
Ben Skeggs
29c0ca7389 drm/nouveau/disp/nv50-: fetch head/OR state at beginning of supervisor
This data will be used by essentially every part of the supervisor
handling process.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2017-06-16 14:04:53 +10:00
Ben Skeggs
78f1ad6f65 drm/nouveau/disp: introduce input/output resource abstraction
In order to properly support the SOR -> SOR + pad macro separation
that occurred with GM20x GPUs, we need to separate OR handling out
of the output path code.

This will be used as the base to support ORs (DAC, SOR, PIOR).

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2017-06-16 14:04:49 +10:00
Ben Skeggs
af85389c61 drm/nouveau/disp: shuffle functions around
Upcoming changes to split OR from output path drastically change the
placement of various operations.

In order to make the real changes clearer, do the moving around part
ahead of time.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2017-06-16 14:04:46 +10:00
Ben Skeggs
4cddeb9b31 drm/nouveau/disp/sor/gf119-: add method to program mst payload information
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-11-07 14:04:42 +10:00
Ben Skeggs
4691409b3e drm/nouveau/disp/sor/gm107: training pattern registers are like gm200
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Cc: stable@vger.kernel.org
2016-06-07 08:11:25 +10:00