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10 commits

Author SHA1 Message Date
Ben Skeggs
ba083ec7a6 drm/nouveau/fifo/gk104-: switch dev_top fault handling to type+inst
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2021-02-11 11:49:57 +10:00
Ben Skeggs
496162037c drm/nouveau/fifo: add id_engine hook
Will be used by common code in subsequent commits to lookup driver
engine state from HW engine ID.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2021-02-11 11:49:57 +10:00
Ben Skeggs
64f7c698be drm/nouveau/fifo: add engine_id hook
Will be used by common code in subsequent commits to replace arrays
indexed by subdev index.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2021-02-11 11:49:56 +10:00
Ben Skeggs
ab0db2bd85 drm/nouveau/fifo: switch to instanced constructor
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2021-02-11 11:49:56 +10:00
Ben Skeggs
efe2a9eccd drm/nouveau/device: pass instance id when looking up a subdev/engine
This switches to using the subdev list for lookup, and otherwise should
be a no-op aside from switching the function signatures.

Callers will be transitioned to split type+inst individually.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2021-02-11 10:14:32 +10:00
Ben Skeggs
9c28abb7db drm/nouveau/subdev: store full subdev name in struct
Much easier to store this to avoid having to reconstruct a string for a
specific subdev, taking into account whether it's instanced or not.

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2021-02-11 10:14:26 +10:00
Alistair Popple
f2fcb0692d drm/nouveau/fifo/tu102: Turing channel preemption fix
Previous hardware allowed a MMU fault to be generated by software to
trigger a context switch for engine recovery. Turing has the capability
to preempt all work from a specific runlist processor and removed the
registers currently used for triggering MMU faults. Attempting to access
these non-existent registers results in further errors, so use the
runlist preemption register instead.

Signed-off-by: Alistair Popple <apopple@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2021-01-29 16:49:13 +10:00
Alistair Popple
26a0cfc163 drm/nouveau/fifo/tu102: FIFO interrupt fixes for Turing
Some of the low level FIFO interrupt status bits have changed for
Turing. Update the handling of these to match the hardware.

Signed-off-by: Alistair Popple <apopple@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2021-01-29 16:49:13 +10:00
Alistair Popple
b8ab4b45e5 drm/nouveau/fifo/tu102: Move Turing specific FIFO functions
Turing requires some changes to FIFO interrupt handling due to changes
in HW register layout. It also requires some changes to implement robust
channel (RC) recovery. This preparatory patch moves the functions
requiring changes into nvkm/engine/fifo/tu102.c so they can be altered
without affecting gk104 and other users. It should not introduce any
functional changes.

Signed-off-by: Alistair Popple <apopple@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2021-01-29 16:49:13 +10:00
Ben Skeggs
f10271ffda drm/nouveau/fifo/tu102: rename implementation from tu104
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-02-20 08:59:58 +10:00
Renamed from drivers/gpu/drm/nouveau/nvkm/engine/fifo/tu104.c (Browse further)