Ben Skeggs
18618fc6d1
drm/nouveau/top: add ioctrl/nvjpg
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2021-02-11 11:50:04 +10:00
Ben Skeggs
ba083ec7a6
drm/nouveau/fifo/gk104-: switch dev_top fault handling to type+inst
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2021-02-11 11:49:57 +10:00
Ben Skeggs
601c2a06d2
drm/nouveau/top: switch to instanced constructor
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2021-02-11 11:49:55 +10:00
Ben Skeggs
5e0d3dbc62
drm/nouveau/top: store device type and instance separately
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MC/FIFO will need this info as they're switched over.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2021-02-11 11:49:53 +10:00
Ben Skeggs
9c28abb7db
drm/nouveau/subdev: store full subdev name in struct
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Much easier to store this to avoid having to reconstruct a string for a
specific subdev, taking into account whether it's instanced or not.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>
2021-02-11 10:14:26 +10:00
Tom Rix
819af2a676
drm: remove unneeded break
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A break is not needed if it is preceded by a return or break
Signed-off-by: Tom Rix <trix@redhat.com>
Acked-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20201019163115.25814-1-trix@redhat.com
2020-11-08 18:59:00 +01:00
Ben Skeggs
7975dfc36a
drm/nouveau/top/gv100-: translate entry for the GSP
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So we're able to connect fault/interrupt handling to the GSP subdev.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2019-02-20 08:59:58 +10:00
Ben Skeggs
936a1678f3
drm/nouveau/core: support multiple nvdec instances
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Turing GPUs can have more than one.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-12-11 15:37:44 +10:00
Ben Skeggs
a1c771a5cb
drm/nouveau/top/gv100: initial support
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18 15:01:34 +10:00
Alexandre Courbot
b62880f796
drm/nouveau/core: add SEC2 engine
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SEC2 is the name given by NVIDIA to the SEC engine post-Fermi (reasons
unknown). Even though it shares the same address range as SEC, its usage
is quite different and this justifies a new engine. Add this engine and
make TOP use it all post-TOP devices should use this implementation and
not the older SEC.
Also quickly add the short gp102 implementation which will be used for
falcon booting purposes.
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2017-03-07 17:05:13 +10:00
Ben Skeggs
51012a39ec
drm/nouveau/top/gp100: initial support
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Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-07-14 11:53:25 +10:00
Ben Skeggs
fb3e9c61ca
drm/nouveau/top/gk104: initial implementation
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Ported from the code currently in engine/fifo/gk104.c.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-05-20 14:43:04 +10:00
