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Author SHA1 Message Date
Rob Herring
9e62ec0e66 arm/arm64: dts: Fix remaining dtc 'unit_address_format' warnings
Fix all the remaining dtc 'unit_address_format' warnings except for the ones
related to 'register-bit-led'. For those, we need to decide on and document
the node name.

Signed-off-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210823165126.2320910-1-robh@kernel.org'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-08-26 13:46:29 +02:00
Linus Walleij
fe2fc0fd37 ARM: dts: ux500: Adjust operating points to reality
The operating points should correspond to the actual frequencies
supported for the CPU. Other patches have fixed so these are
rounded and reported properly, this fixes the device trees to
match.

The Codina variant has a lower frequency than other devices so
indicate this in the device tree.

Cc: phone-devel@vger.kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-08-02 01:41:59 +02:00
Linus Walleij
8a996b2d8a ARM: dts: ux500: Reserve memory carveouts
The Ux500 platforms have some memory carveouts set aside for
communicating with the modem and for the initial secure software
(ISSW). These areas are protected by the memory controller
and will result in an external abort if accessed like common
read/write memory.

On the legacy boot loaders, these were set aside by using
cmdline arguments such as this:

  mem=96M@0 mem_mtrace=15M@96M mem_mshared=1M@111M
  mem_modem=16M@112M mali.mali_mem=32M@128M mem=96M@160M
  hwmem=127M@256M mem_issw=1M@383M mem_ram_console=1M@384M
  mem=638M@385M

Reserve the relevant areas in the device tree instead. The
"mali", "hwmem", "mem_ram_console" and the trailing 1MB at the
end of the memory reservations in the list are not relevant for
the upstream kernel as these are nowadays replaced with
upstream technologies such as CMA. The modem and ISSW
reservations are necessary.

This was manifested in a bug that surfaced in response to
commit 7fef431be9 ("mm/page_alloc: place pages to tail in __free_pages_core()")
which changes the behaviour of memory allocations
in such a way that the platform will sooner run into these
dangerous areas, with "Unhandled fault: imprecise external
abort (0xc06) at 0xb6fd83dc" or similar: the real reason
turns out to be that the PTE is pointing right into one of
the reserved memory areas. We were just lucky until now.

We need to augment the DB8500 and DB8520 SoCs similarly
and also create a new include for the DB9500 used in the
Snowball since this does not have a modem and thus does
not need the modem memory reservation, albeit it needs
the ISSW reservation.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Cc: stable@vger.kernel.org
Cc: David Hildenbrand <david@redhat.com>
Link: https://lore.kernel.org/r/20201213225517.3838501-1-linus.walleij@linaro.org'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-01-15 17:59:31 +01:00
Linus Walleij
f6a76d4256 ARM: dts: ux500: Break out DB8500 DTSI
The DB8500 exists in an enhanced variant named DB8520
for some machines. To clearly distinguish between the
different machines, create an explicit db8500.dtsi
and move the operating points (only known difference so
far) to that file, so we can add an explicit db8520.dtsi
after this.

Cc: Stephan Gerhold <stephan@gerhold.net>
Link: https://lore.kernel.org/r/20191126124738.77690-1-linus.walleij@linaro.org
Reviewed-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2019-12-09 14:45:02 +01:00