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13 commits

Author SHA1 Message Date
Dave Airlie
bf5563ede9 amdgpu/dc: fix indentation warning from smatch.
This fixes all the current smatch:
warn: inconsistent indenting

Reviewed-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-11-07 16:22:04 -05:00
Alex Deucher
4770b18493 drm/amd/display/dc: drop dm_delay_in_microseconds
Use udelay directly.

Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-10-17 10:43:05 +10:00
Harry Wentland
2004f45ef8 drm/amd/display: Use kernel alloc/free
Abstractions are frowned upon.

cocci script:
virtual context
virtual patch
virtual org
virtual report

@@
expression ptr;
@@

- dm_alloc(ptr)
+ kzalloc(ptr, GFP_KERNEL)

@@
expression ptr, size;
@@

- dm_realloc(ptr, size)
+ krealloc(ptr, size, GFP_KERNEL)

@@
expression ptr;
@@

- dm_free(ptr)
+ kfree(ptr)

v2: use GFP_KERNEL, not GFP_ATOMIC. add cocci script

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-28 16:46:15 -04:00
Charlene Liu
c7299705e6 drm/amd/display: only polling VSync Phase within VSync peroroid
Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Yongqiang Sun <yongqiang.sun@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 18:17:17 -04:00
Charlene Liu
b05dee52ef drm/amd/display: fix not enter/exit PSR with latest driver/SBIOS
Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 18:16:49 -04:00
Tony Cheng
8a5d82451e drm/amd/display: use some sensible time out
40s time out is not sensible.

also make all udelay poll happen more frequently since CPU is busy anyways

Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Yongqiang Sun <yongqiang.sun@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 18:16:23 -04:00
Harry Wentland
d0778ebfd5 drm/amd/display: Roll core_link into dc_link
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 18:15:36 -04:00
Amy Zhang
9f72f51d70 drm/amd/display: Refactor to call set PSR wait loop in dce_dmcu instead of dce_clocks
Signed-off-by: Amy Zhang <Amy.Zhang@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 18:07:50 -04:00
Amy Zhang
7db4dede64 drm/amd/display: Add function to get PSR state
Signed-off-by: Amy Zhang <Amy.Zhang@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 18:07:44 -04:00
Alex Deucher
ff5ef99248 drm/amdgpu/display: Enable DCN in DC
Enable DCN in DC.

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 18:06:51 -04:00
Amy Zhang
ece4f358cb drm/amd/display: Simplify some DMCU waits
Signed-off-by: Amy Zhang <Amy.Zhang@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 17:18:08 -04:00
Amy Zhang
3548f0731a drm/amd/display: DMCU PSR Refactor
- Move PSR programming from link encoder to dmcu

Signed-off-by: Amy Zhang <Amy.Zhang@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 17:16:02 -04:00
Anthony Koo
5e7773a219 drm/amd/display: DMCU Compile and Load
Signed-off-by: Anthony Koo <anthony.koo@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2017-09-26 17:12:52 -04:00