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Author SHA1 Message Date
Manikanta Maddireddy
973d7499c5 PCI: tegra: Rearrange Tegra PCIe driver functions
Tegra PCIe has register specifications for:

 - AXI to FPCI(AFI) bridge
 - Multiple PCIe root ports
 - PCIe PHY
 - PCIe pad control

Rearrange Tegra PCIe driver functions so that each function programs
the required module only.

- tegra_pcie_enable_controller(): Program AFI module and enable PCIe
  controller
- tegra_pcie_phy_power_on(): Bring up PCIe PHY
- tegra_pcie_apply_pad_settings(): Program PCIe REFCLK pad settings
- tegra_pcie_enable_ports(): Program each root port and bring up PCIe
  link

Signed-off-by: Manikanta Maddireddy <mmaddireddy@nvidia.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Thierry Reding <treding@nvidia.com>
2019-06-20 17:12:56 +01:00
Manikanta Maddireddy
1056dda8a8 PCI: tegra: Handle failure cases in tegra_pcie_power_on()
Unroll the PCIe power on sequence if any one of the steps fails in
tegra_pcie_power_on().

Signed-off-by: Manikanta Maddireddy <mmaddireddy@nvidia.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Thierry Reding <treding@nvidia.com>
2019-06-20 17:12:45 +01:00
Vidya Sagar
21e2079fe4 PCI: tegra: Use the DMA-API to get the MSI address
Since the upstream MSI memory writes are generated by downstream
devices, it is logically correct to have MSI target memory coming from
the DMA pool reserved for PCIe than from the general memory pool
reserved for CPU access to avoid PCIe DMA addresses coinciding with
MSI target address thereby raising unwanted MSI interrupts.

Enforce this behaviour by retrieving the MSI address through the DMA
API.

Limit the MSI target address to 32-bits to make it work for PCIe
endpoints that support only 32-bit MSI target address; endpoints that
support 64-bit MSI target address work with 32-bit MSI target
address too.

Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
[lorenzo.pieralisi@arm.com: updated commit log]
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Robin Murphy <robin.murphy@arm.com>
Reviewed-by: Thierry Reding <treding@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
2019-04-16 15:27:46 +01:00
Shawn Lin
6e0832fa43 PCI: Collect all native drivers under drivers/pci/controller/
Native PCI drivers for root complex devices were originally all in
drivers/pci/host/.  Some of these devices can also be operated in endpoint
mode.  Drivers for endpoint mode didn't seem to fit in the "host"
directory, so we put both the root complex and endpoint drivers in
per-device directories, e.g., drivers/pci/dwc/, drivers/pci/cadence/, etc.

These per-device directories contain trivial Kconfig and Makefiles and
clutter drivers/pci/.  Make a new drivers/pci/controllers/ directory and
collect all the device-specific drivers there.

No functional change intended.

Link: https://lkml.kernel.org/r/1520304202-232891-1-git-send-email-shawn.lin@rock-chips.com
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
[bhelgaas: changelog]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2018-06-08 07:50:11 -05:00
Renamed from drivers/pci/host/pci-tegra.c (Browse further)