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165 commits

Author SHA1 Message Date
Michal Simek
7a4c31ee87 arm64: zynqmp: Add support for Xilinx Kria SOM board 
There are couple of revisions of SOMs (k26) and associated carrier cards
(kv260).
SOM itself has two major versions:
sm-k26 - SOM with EMMC
smk-k26 - SOM without EMMC used on starter kit with preprogrammed firmware
in QSPI.

SOMs are describing only devices available on the SOM or connections which
are described in specification (for example UART, fwuen).

When SOM boots out of QSPI it uses limited number of peripherals defined by
the specification and present in sm(k)-k26 dtses.
Then a carrier card (CC) detection is happening and DT overlay is applied
to brings new functionality. That's why DT overlays are used. The name is
composed together with SOM name and CC name that's why DT overlays with
these names are generated to make sure they can be used together.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/1ba32590670434b650bacf6410a65579dd30b38b.1632294439.git.michal.simek@xilinx.com
 2021-09-29 13:48:21 +02:00
Michal Simek
35a7430dad arm64: zynqmp: Wire psgtr for zc1751-xm013 
Add psgtr description for SATA and USB.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/8c78625f08c16385a4798e0a62d20df7491ac00e.1628244860.git.michal.simek@xilinx.com
 2021-09-13 08:55:56 +02:00
Michal Simek
b61c4ff951 arm64: zynqmp: Enable xlnx,zynqmp-dwc3 driver for xilinx boards 
The commit 84770f028f ("usb: dwc3: Add driver for Xilinx platforms")
finally add proper support for Xilinx dwc3 driver. This patch is adding DT
description for it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Michael Tretter <m.tretter@pengutronix.de>
Link: https://lore.kernel.org/r/640a3bc0dc3e32560d3e84c2f78b5ae561396eb0.1628244703.git.michal.simek@xilinx.com
 2021-09-13 08:55:56 +02:00
Michal Simek
9d648af44d arm64: zynqmp: Enable gpio and qspi for zc1275-revA 
Add missing gpio and qspio for zc1275-revA board.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/839d833133318feeb2755c4431204b0ef4788cce.1628244299.git.michal.simek@xilinx.com
 2021-09-13 08:55:56 +02:00
Michal Simek
812fa2f0e9 arm64: zynqmp: Fix serial compatible string 
Based on commit 65a2c14d4f ("dt-bindings: serial: convert Cadence UART
bindings to YAML") compatible string should look like differently that's
why fix it to be aligned with dt binding.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://lore.kernel.org/r/89b36e0a6187cc6b05b27a035efdf79173bd4486.1628240307.git.michal.simek@xilinx.com
 2021-09-13 08:55:56 +02:00
Michal Simek
adc40ff803 arm64: zynqmp: Remove not documented is-dual property 
Remove is-dual not documented property and also update comment about QSPI
sizes to reflect dual configuration as 16MB + 16MB.
Only single configuration is supported now.

Reported-by: Quanyang Wang <quanyang.wang@windriver.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://lore.kernel.org/r/876c53b92f99623bae45d5c0c5ae79ee3e24f745.1628239345.git.michal.simek@xilinx.com
 2021-09-13 08:55:55 +02:00
Michal Simek
a025f01d46 arm64: zynqmp: Add psgtr description to zc1751 dc1 board 
Wire psgtr for zc1751 dc1 board.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/51d9a5e0aa26b0ea79b8823bf3d15f4e2542f927.1623684253.git.michal.simek@xilinx.com
 2021-09-13 08:55:55 +02:00
Michal Simek
e6a52b9e3b arm64: zynqmp: Add support for zcu102-rev1.1 board 
zcu102 rev1.1 compare to rev1.0 is using by default different DDR memory
which requires different configuration. The reason for adding this file to
Linux kernel is that U-Boot fdtfile variable is composed based on board
revision (in eeprom) and dtb file should exist in standard distibutions for
passing it to Linux kernel.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/38bbbeb885f4d9ba466c43ab9b4d25190a3552fb.1623684253.git.michal.simek@xilinx.com
 2021-09-13 08:55:55 +02:00
Michal Simek
31533c2176 arm64: zynqmp: Remove description for 8T49N287 and si5382 chips 
Based on commit 73d677e9f3 ("arm64: dts: zynqmp: Remove si5328 device
nodes") also remove description for clock chips which don't have Linux
driver yet.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/7557288230567fa136ba3edc004d5bfe4f4c6590.1623684253.git.michal.simek@xilinx.com
 2021-09-13 08:55:55 +02:00
Michal Simek
cd28f90bbc arm64: zynqmp: Sync psgtr node location with zcu104-revA 
zcu104-revA has node below pinctrl which is not the same on revC. Sync
location for easier comparison.
Also zc1751-dc1 is not using this position.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/4b691bab5ba83b5352d4669bd54bcdb8273b2156.1623684253.git.michal.simek@xilinx.com
 2021-09-13 08:55:55 +02:00
Michal Simek
bc97eb86c1 arm64: zynqmp: Add reset description for sata 
Sata needs to get reset before configuration that's why add property for it
there.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/b7f61daa2fe1a2300767af73c46b8082088f741a.1623684253.git.michal.simek@xilinx.com
 2021-09-13 08:55:55 +02:00
Michal Simek
360a878328 arm64: zynqmp: Move rtc to different location on zcu104-revA 
Move it the same location as is on zcu104-revC for easier comparison.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/fe6c3f96fbd359409b7fef85d2c2ada584b3d0cc.1623684253.git.michal.simek@xilinx.com
 2021-09-13 08:55:55 +02:00
Michal Simek
56e5460151 arm64: zynqmp: Wire qspi on multiple boards 
Couple of boards have qspi on the board that's why enable controller and
describe them.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/01a69ee6590245b5bee70a2553f6faac0d31ca76.1623684253.git.michal.simek@xilinx.com
 2021-09-13 08:55:55 +02:00
Michal Simek
f4be206cd1 arm64: zynqmp: Remove information about dma clock on zcu106 
Clock setting is not static anymore that's why it depends on firmware setup
that's why remove this comment.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/17973ffda4e163a4b89d4732fe6fc7e089962ae7.1623684253.git.michal.simek@xilinx.com
 2021-09-13 08:55:54 +02:00
Srinivas Neeli
a787716afe arm64: zynqmp: Update rtc calibration value 
As per the design specification
"The 16-bit Seconds Calibration Value represents the number of
 Oscillator Ticks that are required to measure the largest time
 period that is less than or equal to 1 second.
 For an oscillator that is 32.768 KHz, this value will be 0x7FFF."

Signed-off-by: Srinivas Neeli <srinivas.neeli@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/0d36d9fe999ff82f10d42ab5fc0d1e907c26ac34.1623684253.git.michal.simek@xilinx.com
 2021-09-13 08:55:54 +02:00
Michal Simek
1d4bd118c9 arm64: zynqmp: Add note about UHS mode on some boards 
Add note about UHS mode and add no-1-8-v property to zc1751-dc1 board.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/462b95844e7aedb00768035913265d7af90c3b2f.1623684253.git.michal.simek@xilinx.com
 2021-09-13 08:55:54 +02:00
Michal Simek
5f9a32bafc arm64: zynqmp: Move DP nodes to the end of file on zcu106 
This location is used by others DTs files that's why this move.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>

Link: https://lore.kernel.org/r/d14404afd846f975a421023e9e9b6ad18585719f.1623684253.git.michal.simek@xilinx.com
 2021-09-13 08:55:54 +02:00
Michal Simek
1dff0abaae arm64: zynqmp: Remove can aliases from zc1751 
Networking subsystem is not using aliases that's why remove them for can
devices. There is also no any other Xilinx ZynqMP DT file with them.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/475a60fc4d01ba9c61579801fb84620b6905dcad.1623684253.git.michal.simek@xilinx.com
 2021-09-13 08:55:54 +02:00
Mounika Grace Akula
69aa2de18a arm64: zynqmp: Add reset-on-timeout to all boards and modify default timeout value 
This patch adds reset-on-timeout to FPD WDT which will trigger an
interrupt to PMU when watchdog expiry happens and PMU takes the
necessary action. If this property is not enabled, reason will not be
known when watchdog expiry happens.
This patch also modifies the default timeout to 60 seconds. Reason is
that if u-boot enables WDT, it will set the timeout to 10 seconds and
this is not enough to boot till Linux and start the WDT application in
Linux. 60 seconds is the maximum safest value to boot till Linux and
start the WDT application.

Users need to change this timeout value to fit their needs.

Signed-off-by: Mounika Grace Akula <mounika.grace.akula@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/5848a81447921240fddfe2f5749ae0746fcbbdbd.1623684253.git.michal.simek@xilinx.com
 2021-09-13 08:55:54 +02:00
Michal Simek
58ccd7e89c arm64: zynqmp: List reset property for ethernet phy 
Add information about reset gpio for ethernet phy in case someone wants to
use it.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/e153f0cda37a2a6ea1c6e11fb0a4af1d400f29e2.1623684253.git.michal.simek@xilinx.com
 2021-09-13 08:55:54 +02:00
Michal Simek
d65ec93f21 arm64: zynqmp: Add nvmem alises for eeproms 
Use nvmem alias to point to eeprom memory which contains information about
board. The change is done based on discussion in the link below.

Link: https://lore.kernel.org/r/CAL_JsqLMDqpkyg-Q7mUfw-XH67-v068Q6e9wTq2UOoN=0-_coQ@mail.gmail.com
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/9b860b47ec3ca64340b4d29317e92b667236d7d1.1623684253.git.michal.simek@xilinx.com
 2021-09-13 08:55:54 +02:00
Michal Simek
da2618b5ae arm64: zynqmp: Move clock node to zynqmp-clk-ccf.dtsi 
Using clock firmware driver is not the only one option how to configure
clock. In past fixed clocks were also used and that configuration is still
valid that's why move clock firmware node to the same file where zynqmp_clk
references are used.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/48bfd8cf0de4d10b9c4d745218595f28954f70d5.1623684253.git.michal.simek@xilinx.com
 2021-09-13 08:55:53 +02:00
Michal Simek
bef1e3f5e4 arm64: zynqmp: Remove additional newline 
This is sync between Linux and U-Boot. Trivial change.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/16f6f41c8d748d3c7cd4f49b2839e63a5b41c944.1623684253.git.michal.simek@xilinx.com
 2021-09-13 08:55:53 +02:00
Michal Simek
f4df4f5868 arm64: zynqmp: Enable nand driver for dc2 and dc3 
Add description for nand devices on zc1751 dc2 and dc3 boards.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/e103821bdb717132559e780f1a4f4f6fefc95688.1623684253.git.michal.simek@xilinx.com
 2021-09-13 08:55:53 +02:00
Michal Simek
7248f5784b arm64: zynqmp: Wire DP and DPDMA for dc1/dc4 
Enable Display Port and Display Port DMA for zc1751 dc1 and dc4.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/dbbd212bcc587e835d6df2f91622f5baa124bff5.1623684253.git.michal.simek@xilinx.com
 2021-09-13 08:55:53 +02:00
Michal Simek
69f8aec4f9 arm64: zynqmp: Add missing mio-bank properties to dc1 and dc5 
Add missing mio-bank properties to zc1751 dc1 and dc5 boards.
The same change was done by commit 63481699d6 ("arm64: dts: zynqmp: Add
missing mio-bank properties to sdhcis").

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/2b2ab31639c706651dfd319f5b6bc59e68f111b6.1623684253.git.michal.simek@xilinx.com
 2021-09-13 08:55:53 +02:00
Stefano Stabellini
d58f922753 arm64: zynqmp: Add missing SMID for pcie to zynqmp.dtsi 
The SMMU is disabled in device tree so this change has no impact.
The benefit is that this way it is in sync with xen.dtsi. Xen enables
the SMMU and makes use of it.

Signed-off-by: Stefano Stabellini <stefano.stabellini@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/43f21f5033f7806fba049474bced6131c8cb98ba.1623684253.git.michal.simek@xilinx.com
 2021-09-13 08:55:53 +02:00
Michal Simek
2f6aa2a51a arm64: zynqmp: Disable WP on zcu111 
On this board there is SD slot without WP connected.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/88e41d4f5c6a7353762bd5ad38b92ce352c3a123.1623684253.git.michal.simek@xilinx.com
 2021-09-13 08:55:53 +02:00
Michal Simek
8b698f1b98 arm64: zynqmp: Add phy description for usb3.0 
usb3.0 requires serdes setting that's why also wire it up.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/cd856e5f87bc967373691d04e79de3d0022ef424.1623684253.git.michal.simek@xilinx.com
 2021-09-13 08:55:53 +02:00
Michal Simek
c7d5a46114 arm64: zynqmp: Correct psgtr description for zcu100-revC 
Enable psgtr node and also fix clock names to be aligned with other zynqmp
boards.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/bd35fdaac08208578b2bb5059ba2c59bb4e66dac.1623684253.git.michal.simek@xilinx.com
 2021-09-13 08:55:53 +02:00
Michal Simek
a09c2fea11 arm64: zynqmp: Wire psgtr for zc1751-xm015 
Add psgtr description for SATA and USB. Display Port could be also added
but it wasn't tested yet.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/3fb11fdb9ade828fa174379515e45ba02bc17247.1623684253.git.michal.simek@xilinx.com
 2021-09-13 08:55:52 +02:00
Michal Simek
b20c1e4d1f arm64: zynqmp: Correct zcu111 psgtr description 
DP and SATA psgtrs are swapped.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/d47cbf374423cb71bb4be5e45e3d834da0c4673a.1623684253.git.michal.simek@xilinx.com
 2021-09-13 08:55:52 +02:00
Michal Simek
c821045f18 arm64: zynqmp: Add pinctrl description for all boards 
The commit 1dccb5ec01 ("dt-bindings: pinctrl: Add binding for ZynqMP
pinctrl driver") and commit 8b242ca700 ("pinctrl: Add Xilinx ZynqMP
pinctrl driver support") add support for Xilinx ZynqMP pinctrl driver
that's why describe pins configuration for current boards.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/d8bc42600da85f5a23d977d4b61e6528720573e5.1623684253.git.michal.simek@xilinx.com
 2021-09-13 08:55:52 +02:00
Michal Simek
d8e4bc0b91 arm64: zynqmp: Fix irps5401 device nodes 
- Add compatible string for irps5401 chip.
- Do not use irps54012 as device node which is not correct.
- Fix addresses of irps5401/u180 on zcu104 revisions.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/10bf5f9e7a18579626fb1850e3a8a7476ba6f2ed.1623684253.git.michal.simek@xilinx.com
 2021-09-13 08:55:52 +02:00
Michal Simek
4c65436e27 arm64: zynqmp: Enable fpd_dma for zcu104 platforms 
Enable fpd_dma for this board.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/76d330bf2b2414efa2e98965a3ca7f7c43e3645f.1623684253.git.michal.simek@xilinx.com
 2021-09-13 08:55:52 +02:00
Amit Kumar Mahapatra
167721a590 arm64: zynqmp: Do not duplicate flash partition label property 
In kernel 5.4, support has been added for reading MTD devices via the nvmem
API.
For this the mtd devices are registered as read-only NVMEM providers under
sysfs with the same name as the flash partition label property.

So if flash partition label property of multiple flash devices are
identical then the second mtd device fails to get registered as a NVMEM
provider.

This patch fixes the issue by having different label property for different
flashes.

Signed-off-by: Amit Kumar Mahapatra <amit.kumar-mahapatra@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/6c4b9b9232b93d9e316a63c086540fd5bf6b8687.1623684253.git.michal.simek@xilinx.com
 2021-09-13 08:55:52 +02:00
Michal Simek
4234645d1f arm64: zynqmp: Disable CCI by default 
There is no reason to have CCI no enabled by default. Enable it when your
system configuration requires it. In Xilinx configuration flow this is work
for Device Tree Generator which reads information from HW Design
configuration.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/f507d45fbaa0bd31f641e758efa40a2532466ced.1623684253.git.michal.simek@xilinx.com
 2021-09-13 08:55:52 +02:00
Quanyang Wang
73d677e9f3 arm64: dts: zynqmp: Remove si5328 device nodes 
The function of_i2c_get_board_info will call of_modalias_node to check
if a device_node contains "compatible" string. But for the device si5328
at zcu102/zcu106 boards, there is no proper DT bindings for them. So remove
si5328 device nodes from dts files to eliminate the error info in the boot
message:

i2c i2c-10: of_i2c: modalias failure on /axi/i2c@ff030000/i2c-mux@74/i2c@4/clock-generator@69
i2c i2c-10: Failed to create I2C device for /axi/i2c@ff030000/i2c-mux@74/i2c@4/clock-generator@69

Signed-off-by: Quanyang Wang <quanyang.wang@windriver.com>
Link: https://lore.kernel.org/r/20210308115437.2232847-1-quanyang.wang@windriver.com
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
 2021-03-08 17:27:08 +01:00
Laurent Pinchart
b06112cd5e arm64: dts: zynqmp: Add power domain for the DisplayPort DMA controller 
The DisplayPort DMA controller (DPDMA) is located in the same power
domain as the DisplayPort Subsystem (DPSUB). Specify the power domain in
the device tree.

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://lore.kernel.org/r/20210306230915.14979-1-laurent.pinchart@ideasonboard.com
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
 2021-03-08 17:25:30 +01:00
Laurent Pinchart
55563399bb arm64: dts: zynqmp: Wire up the DisplayPort subsystem 
Enable the dpsub device and wire it up to the PS-GTR PHY lanes routed to
the DisplayPort connector.

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/9769d4d103b6eb75e3324825117f6832a746004e.1611232558.git.michal.simek@xilinx.com
 2021-02-01 10:40:37 +01:00
Michal Simek
b0f89cf5b6 arm64: dts: zynqmp: Add DisplayPort subsystem 
Add a DT node for the DisplayPort subsystem, a hard IP present in the
Zynq Ultrascale+ MPSoC.

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/4d978aef852cacdfb35aa8e50d648a787e73b90c.1611232558.git.michal.simek@xilinx.com
 2021-02-01 10:40:36 +01:00
Laurent Pinchart
7b6714b3ed arm64: dts: zynqmp: Add DPDMA node 
Add a DT node for the DisplayPort DMA engine (DPDMA).

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Michal Simek <michal.simek@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/3d11015512a085592f2aca76eeddc04178d38bbe.1611232558.git.michal.simek@xilinx.com
 2021-02-01 10:40:34 +01:00
Michal Simek
127b856f67 arm64: dts: zynqmp: Add description for zcu104 revC 
Xilinx ZynqMP zcu104 revC and newer board revisions have different i2c
structure compare to revA. The rest of the board is the same from software
perspective.
Also enable DMAs and QSPI.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/17f68c235ea1ce96c3293ca0cf3178951d6663f7.1611224800.git.michal.simek@xilinx.com
 2021-02-01 10:37:53 +01:00
Michal Simek
8ac47837f0 arm64: dts: zynqmp: Add missing iommu IDs 
Add missing iommu IDs to all IPs which have IDs assigned.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/78afdafdc60c3182318894f2808f7f337a798278.1611224800.git.michal.simek@xilinx.com
 2021-02-01 10:36:36 +01:00
Michal Simek
1f9fcf6573 arm64: dts: zynqmp: Add missing lpd watchdog node 
Xilinx ZynqMP SoC has FPD (Full Power Domain) and LPD (Low Power Domain)
watchdogs. There are cases where also LPD WDT should be used by Arm cores
that's why list it with disabled status.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/0489a1d5528614f1d570ea153d38b813f0c1eb9f.1611224800.git.michal.simek@xilinx.com
 2021-02-01 10:36:35 +01:00
Michal Simek
cbf8bed0e3 arm64: dts: zynqmp: Wire zynqmp qspi controller 
Add missing ZynqMP qspi IP. It works in single mode only.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/5cebbc59a452f282c4ce0f0e1dffecadac8f126a.1611224800.git.michal.simek@xilinx.com
 2021-02-01 10:36:34 +01:00
Michal Simek
41b452a570 arm64: dts: zynqmp: Wire arasan nand controller 
Add missing arasan controller with clocks. Disable it by default. Every
board can enable it with specifying others properties.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/05cc1ce7973ac5200aeca428c137b422c827c5e8.1611224800.git.michal.simek@xilinx.com
 2021-02-01 10:36:32 +01:00
Michal Simek
63481699d6 arm64: dts: zynqmp: Add missing mio-bank properties to sdhcis 
Add missing xlnx,mio-bank property to sdhci nodes. Also add properties with
0 value to have it listed in case that files are copied to different
projects where default case doesn't need to be handled in the same way.
That's why explicitly list them too.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/dbdfcc1b25af8b28fc658a37ce18902978cb410d.1611224800.git.michal.simek@xilinx.com
 2021-02-01 10:36:30 +01:00
Michal Simek
002002c0ad arm64: dts: zynqmp: Add label for zynqmp_ipi 
Add label which is used by bootloader for adding bootloader specific flag.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/3dc8416abdd3498e61edcd83830a12af295c5c6d.1611224800.git.michal.simek@xilinx.com
 2021-02-01 10:36:28 +01:00
Michal Simek
51733f16c6 arm64: dts: zynqmp: Enable phy driver for Sata on zcu102/zcu104/zcu106 
Enable psgtr driver and write clocks property to get sata to work.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Link: https://lore.kernel.org/r/80b52ef97501968ee97fc152363bc4b9b7bb2cff.1611224800.git.michal.simek@xilinx.com
 2021-02-01 10:36:26 +01:00