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Author SHA1 Message Date
Paul Cercueil
71f8817c28 MIPS: ingenic: Unconditionally enable clock of CPU #0
Make sure that the PLL that feeds the CPU won't be stopped while the
kernel is running.

This fixes a problem on JZ4760 (and probably others) where under very
specific conditions, the main PLL would be turned OFF when the kernel
was shutting down, causing the shutdown process to fail.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-08-29 13:31:02 +02:00
周琰杰 (Zhou Yanjie)
14d72af7ab MIPS: Ingenic: Add system type for new Ingenic SoCs.
Add JZ4730, JZ4750, JZ4755, JZ4760, JZ4760B, X2000H, and X2100 system
type for cat /proc/cpuinfo to give out JZ4730, JZ4750, JZ4755, JZ4760,
JZ4760B, X2000H, and X2100.

Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
Reviewed-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-07-19 13:16:42 +02:00
周琰杰 (Zhou Yanjie)
a9fee3a513 MIPS: Ingenic: Add system type for new Ingenic SoCs.
Add JZ4775, X1000E, X2000, and X2000E system type for cat /proc/cpuinfo
to give out JZ4775, X1000E, X2000 and X2000E.

Signed-off-by: 周琰杰 (Zhou Yanjie) <zhouyanjie@wanyeetech.com>
Reviewed-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-09-27 10:57:27 +02:00
Paul Cercueil
f0f4a75307 MIPS: generic: Add support for Ingenic SoCs
Add support for Ingenic SoCs in arch/mips/generic/.

The Kconfig changes are here to ensure that it is possible to compile
either a generic kernel that supports Ingenic SoCs, or a Ingenic-only
kernel, both using the same code base, to avoid duplicated code.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2020-09-18 16:33:59 +02:00