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Author SHA1 Message Date
Ori Messinger
d26bbbcc16 amdgpu: Add Missing Sienna Cichlid DID
The purpose of this patch is to add a missing device ID for Sienna Cichlid.
The missing ID "0x73A1" is now added to the "amdgpu_drv.c" file.

Signed-off-by: Ori Messinger <Ori.Messinger@amd.com>
Reviewed-by: Kent Russell <kent.russell@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-02-01 11:51:46 -05:00
Lang Yu
cd63989e0e drm/amd/amdkfd: adjust dummy functions' placement
Move all the dummy functions in amdgpu_amdkfd.c to
amdgpu_amdkfd.h as inline functions.

Signed-off-by: Lang Yu <Lang.Yu@amd.com>
Suggested-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-28 14:58:27 -05:00
Alex Deucher
33cf440d59 drm/amdgpu: disable gpu reset on Vangogh for now
Until the issues in the SMU firmware are fixed.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
2021-01-28 14:58:10 -05:00
Colin Ian King
5993e79398 drm/amdgpu: Fix masking binary not operator on two mask operations
Currently the ! operator is incorrectly being used to flip bits on
mask values. Fix this by using the bit-wise ~ operator instead.

Addresses-Coverity: ("Logical vs. bitwise operator")
Fixes: 3c9a7b7d6e ("drm/amdgpu: update mmhub mgcg&ls for mmhub_v2_3")
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-25 17:47:05 -05:00
Jingwen Chen
64dcf2f01d drm/amd/amdgpu: add error handling to amdgpu_virt_read_pf2vf_data
[Why]
when vram lost happened in guest, try to write vram can lead to
kernel stuck.

[How]
When the readback data is invalid, don't do write work, directly
reschedule a new work.

Signed-off-by: Jingwen Chen <Jingwen.Chen2@amd.com>
Reviewed-by: Monk Liu<monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-25 17:46:48 -05:00
Horace Chen
91fb309d82 drm/amdgpu: race issue when jobs on 2 ring timeout
Fix a racing issue when jobs on 2 rings timeout simultaneously.

If 2 rings timed out at the same time, the
amdgpu_device_gpu_recover will be reentered. Then the
adev->gmc.xgmi.head will be grabbed by 2 local linked list,
which may cause wild pointer issue in iterating.

lock the device earily to prevent the node be added to 2
different lists.

also increase karma for the skipped job since the job is also
timed out and should be guilty.

Signed-off-by: Horace Chen <horace.chen@amd.com>
Reviewed-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-25 17:45:16 -05:00
Felix Kuehling
eda1068dc9 drm/amdgpu: Make contiguous pinning optional
Enable pinning of VRAM without forcing it to be contiguous. When memory is
already pinned, make sure it's contiguous if requested.

Suggested-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-25 17:45:10 -05:00
Huang Rui
dcb820d185 drm/amdgpu: remove gpu info firmware of green sardine
The ip discovery is supported on green sardine, it doesn't need gpu info
firmware anymore.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Prike Liang <Prike.Liang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-21 09:55:23 -05:00
Feifei Xu
2b3a1f515f drm/amdgpu:Add pcie gen5 support in pcie capability.
Add PCIE_SPEED_32_0GT and PCIE GEN5 support for amdgpu.

Signed-off-by: Feifei Xu <Feifei.Xu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-21 09:54:56 -05:00
Jinzhou Su
366468ff6c drm/amdgpu: Allow GfxOff on Vangogh as default
Send allow GfxOff message to SMU to enter GfxOff
mode as default.

Signed-off-by: Jinzhou Su <Jinzhou.Su@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-21 09:54:50 -05:00
Aaron Liu
3c9a7b7d6e drm/amdgpu: update mmhub mgcg&ls for mmhub_v2_3
Starting from vangogh, the ATCL2 and DAGB0 registers relative
to mgcg/ls has changed.

For MGCG:
Replace mmMM_ATC_L2_MISC_CG with mmMM_ATC_L2_CGTT_CLK_CTRL.

For MGLS:
Replace mmMM_ATC_L2_MISC_CG with mmMM_ATC_L2_CGTT_CLK_CTRL.
Add DAGB0_(WR/RD)_CGTT_CLK_CTRL registers.

Signed-off-by: Aaron Liu <aaron.liu@amd.com>
Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-21 09:54:07 -05:00
Jinzhou Su
860cc26a01 drm/amdgpu: Add RLC_PG_DELAY_3 for Vangogh
Driver should enable the CGPG feature for RLC in safe mode to
prevent any misalignment or conflict in middle of any power
feature entry/exit sequence.
Achieved by setting RLC_PG_CNTL.GFX_POWER_GATING_ENABLE = 0x1,
and RLC_PG_DELAY_3.CGCG_ACTIVE_BEFORE_CGPG to the desired CGPG
hysteresis value in refclk count.

Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Jinzhou Su <Jinzhou.Su@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-21 09:53:33 -05:00
Jinzhou Su
91067d8959 drm/amdgpu: modify GCR_GENERAL_CNTL for Vangogh
GCR_GENERAL_CNTL is defined differently in gc_10_1_0_offset.h and
gc_10_3_0_offset.h. Update GCR_GENERAL_CNTL for Vangogh.

Signed-off-by: Jinzhou Su <Jinzhou.Su@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-20 16:38:23 -05:00
Jinzhou Su
d3dc8f4d18 drm/amdgpu: Remove GFXOFF MASK for Vangogh
1. Remove PP_GFXOFF_MASK and then GFXOFF can be enabled
    by user space.
 2. GFXOFF is still disabled on Vangogh by default.
 3. When GFXOFF feature on Vangogh landed, will enable
    GFXOFF by default.
 4. GFXOFF can be enabled by debugfs interface amdgpu_gfxoff.

Signed-off-by: Jinzhou Su <Jinzhou.Su@amd.com>
Acked-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-20 16:38:23 -05:00
Jingwen Chen
b43ae488ac drm/amd/amdgpu: remove redundant flush_delayed_work
When using cancel_delayed_work_sync, there's no need
to flush_delayed_work first. This sequence can lead to
a redundant loop of work executing.

Signed-off-by: Jingwen Chen <Jingwen.Chen2@amd.com>
Reviewed-by: Monk Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-20 16:38:17 -05:00
Daniel Vetter
a6b8720c2f Merge tag 'amd-drm-next-5.12-2021-01-20' of https://gitlab.freedesktop.org/agd5f/linux into drm-next
amd-drm-next-5.12-2021-01-20:

amdgpu:
- Fix non-x86 build
- W=1 fixes from Lee Jones
- Enable GPU reset on Navy Flounder
- Kernel doc fixes
- SMU workload profile fixes for APUs
- Display updates
- SR-IOV fixes
- Vangogh SMU feature enablment and bug fixes
- GPU reset support for Vangogh
- Misc cleanups

Conflicts:
	drivers/gpu/drm/amd/display/dc/dcn10/dcn10_mpc.c

Resolve the conflict by picking the initialization value from amd from
f03e80d2e8 ("drm/amd/display: Initialize stack variable") over the
one Linus picked in 61d791365b ("drm/amd/display: avoid
uninitialized variable warning"). It shouldn't matter.

From: Alex Deucher <alexdeucher@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210120060951.22600-1-alexander.deucher@amd.com
Signed-off-by: Daniel Vetter <daniel.vetter@intel.com>
2021-01-20 13:08:18 +01:00
Daniel Vetter
71c46fc33a drm-misc-next for v5.12:
UAPI Changes:
 - Fix fourcc macro for amlogic video fbc.
 
 Cross-subsystem Changes:
 - Export pci_rebar_bytes_to_size.
 - Add a PCI quirk to increase bar0 for RX 5600 XT Pulse to max possible size.
 - Convert devicetree bindings to use the OF graph schema.
 - Update s6e63m0 bindings.
 - Make omapfb2 DSI_CM incompatible with drm/omap2 DSI-CM because of
   module conflicts.
 - Add Zack Rusin as vmwgfx maintainer.
 - Add CONFIG_DMABUF_DEBUG for validating dma-buf users don't loo kat struct page when importing or detaching.
 
 Core Changes:
 - Remove references to drm_device.pdev
 - Fix regression in ttm_bo_move_to_lru_tail().
 - Assorted docbook updates.
 - Do not send dp-mst hotplug events on error when probing.
 - Move some agp macros to agpsupport.c, so it's not always compiled.
 - Move drm_need_swiotlb.h to drm_cache.c
 - Only build drm_memory.o for legacy drivers, and move CONFIG_DRM_VM to legacy.
 - Nuke drm_device.hose
 - Warn when the ttm resource manager is non-empty when disabling.
 - Assorted small fixes.
 
 Driver Changes:
 - Small assorted fixes in radeon, v3d, hisilicon, mipi-dbi, panfrost, hibmc, vc4, amdgpu, vkms, vmwgfx.
 - Move hisilicon to use simple encode.
 - Add writeback connector to vkms.
 - Add support for BT2020 to DE3.
 - Use gem prime mmap helpers in vc4, and move the mmap function upwards.
 - Use managed drm device, and cleanup error paths and display registers in vmwgfx.
 - Use correct bus_format and connector_type for innolux_n116bge.
 - Fix a lot of warnings with W=1 (Lee Jones)
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Merge tag 'drm-misc-next-2021-01-19' of git://anongit.freedesktop.org/drm/drm-misc into drm-next

drm-misc-next for v5.12:

UAPI Changes:
- Fix fourcc macro for amlogic video fbc.

Cross-subsystem Changes:
- Export pci_rebar_bytes_to_size.
- Add a PCI quirk to increase bar0 for RX 5600 XT Pulse to max possible size.
- Convert devicetree bindings to use the OF graph schema.
- Update s6e63m0 bindings.
- Make omapfb2 DSI_CM incompatible with drm/omap2 DSI-CM because of
  module conflicts.
- Add Zack Rusin as vmwgfx maintainer.
- Add CONFIG_DMABUF_DEBUG for validating dma-buf users don't loo kat struct page when importing or detaching.

Core Changes:
- Remove references to drm_device.pdev
- Fix regression in ttm_bo_move_to_lru_tail().
- Assorted docbook updates.
- Do not send dp-mst hotplug events on error when probing.
- Move some agp macros to agpsupport.c, so it's not always compiled.
- Move drm_need_swiotlb.h to drm_cache.c
- Only build drm_memory.o for legacy drivers, and move CONFIG_DRM_VM to legacy.
- Nuke drm_device.hose
- Warn when the ttm resource manager is non-empty when disabling.
- Assorted small fixes.

Driver Changes:
- Small assorted fixes in radeon, v3d, hisilicon, mipi-dbi, panfrost, hibmc, vc4, amdgpu, vkms, vmwgfx.
- Move hisilicon to use simple encode.
- Add writeback connector to vkms.
- Add support for BT2020 to DE3.
- Use gem prime mmap helpers in vc4, and move the mmap function upwards.
- Use managed drm device, and cleanup error paths and display registers in vmwgfx.
- Use correct bus_format and connector_type for innolux_n116bge.
- Fix a lot of warnings with W=1 (Lee Jones)

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/5c3ad775-48ce-33ee-e4c6-a5e1e540f845@linux.intel.com
2021-01-20 10:29:40 +01:00
Maarten Lankhorst
c31eb10fd5 drm/amdgpu: Remove accidentally added small unused hunk.
Commit 8f66090b7b ("drm/amdgpu: Remove references to struct drm_device.pdev")
accidentally adds an initialization of adev, which isn't used anywhere. This
caused a compiler warning on the unused variable, remove it.

Fixes: 8f66090b7b ("drm/amdgpu: Remove references to struct drm_device.pdev")
Cc: Thomas Zimmermann <tzimmermann@suse.de>
Cc: Christian König <christian.koenig@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Reviewed-by: Thomas Zimmermann <tzimmermann@suse.de>
2021-01-19 11:18:39 +01:00
John Clements
3f5f188963 drm/amdgpu: updated fw attestation interface
updated interface to be compatible with latest FW

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: John Clements <john.clements@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-15 15:21:41 -05:00
Guchun Chen
fe2d9f5abf drm/amdgpu: toggle on DF Cstate after finishing xgmi injection
Fixes: 5c23e9e05e ("drm/amdgpu: Update RAS XGMI error inject sequence")
Signed-off-by: Guchun Chen <guchun.chen@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-15 15:20:00 -05:00
Nirmoy Das
0d7ab83546 drm/amdgpu: Remove unused variable
Remove unused space_needed variable.

Fixes: 453f617a30 ("drm/amdgpu: Resize BAR0 to the maximum available size, even if it doesn't cover VRAM")
Signed-off-by: Nirmoy Das <nirmoy.das@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Christian König <christian.koenig@amd.com>
Link: https://patchwork.freedesktop.org/patch/413807/
2021-01-15 13:00:57 +01:00
Dave Airlie
2ce542e517 Merge tag 'amd-drm-next-5.12-2021-01-08' of https://gitlab.freedesktop.org/agd5f/linux into drm-next
amd-drm-next-5.12-2021-01-08:

amdgpu:
- Rework IH ring handling on vega and navi
- Rework HDP handling for vega and navi
- swSMU documenation updates
- Overdrive support for Sienna Cichlid and newer asics
- swSMU updates for vangogh
- swSMU updates for renoir
- Enable FP16 on DCE8-11
- Misc code cleanups and bug fixes

radeon:
- Fixes for platforms that can't access PCI resources correctly
- Misc code cleanups

From: Alex Deucher <alexdeucher@gmail.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210108221811.3868-1-alexander.deucher@amd.com
Signed-off-by: Dave Airlie <airlied@redhat.com>
2021-01-15 09:05:32 +10:00
Likun Gao
51e3ca7aa9 drm/amdgpu: set power brake sequence
Add function to set power brake sequence.

Signed-off-by: Likun Gao <Likun.Gao@amd.com>
Reviewed-by: Kenneth Feng <kenneth.feng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-14 13:13:09 -05:00
Jinzhou Su
ecaafb7b5a drm/amdgpu: Add secure display TA interface
Add interface to load, unload, invoke command for
secure display TA.

v2: Add debugfs interface for secure display TA
v3: fix warning in copy_from_user (Alex)

Signed-off-by: Jinzhou.Su <Jinzhou.Su@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-13 23:58:14 -05:00
Jinzhou Su
a944c12724 drm/amdgpu: Add Secure Display TA header file
Add file ta_secureDisplay_if.h for Secure Display TA

Signed-off-by: Jinzhou Su <Jinzhou.Su@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-13 23:53:28 -05:00
mengwang
278cdb6834 drm/amdgpu: add new device id for Renior
add DID 0x164C into pciidlist under CHIP_RENOIR family.

Signed-off-by: mengwang <mengbing.wang@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org # 5.10.x
2021-01-13 23:53:27 -05:00
Prike Liang
8bf0835132 drm/amdgpu: add green_sardine device id (v2)
Add green_sardine PCI id support and map it to renoir asic type.

v2: add apu flag

Signed-off-by: Prike Liang <Prike.Liang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org # 5.10.x
2021-01-13 23:53:27 -05:00
Huang Rui
78683229dd drm/amdgpu: fix vram type and bandwidth error for DDR5 and DDR4
This patch is to update atomfirmware parser for the memory type and
bandwidth of DDR5 and DDR4.

Signed-off-by: Huang Rui <ray.huang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-13 23:53:17 -05:00
chen gong
527687e6d3 drm/amdgpu/gfx10: add updated GOLDEN_TSC_COUNT_UPPER/LOWER register offsets for VGH
The address of the GOLDEN_TSC_COUNT_UPPER/GOLDEN_TSC_COUNT_LOWER for
Vnagogh are different from the others.

The offset of the GOLDEN_TSC_COUNT_UPPER for Vangogh is 0x0025 by
calculation.
The offset of the GOLDEN_TSC_COUNT_LOWER for Vangogh is 0x0026 by
calculation.

Signed-off-by: chen gong <curry.gong@amd.com>
Acked-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-13 23:53:05 -05:00
Alex Deucher
b6903089a5 drm/amdgpu: Enable GPU reset for vangogh
Enable GPU reset when we encounter a hang.

Acked-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
2021-01-13 23:48:06 -05:00
Alex Deucher
b913ec628c drm/amdgpu: fix mode2 reset sequence for vangogh
We need to save and restore PCI config space.

Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
2021-01-13 23:47:58 -05:00
Alex Deucher
1608635534 drm/amdgpu/nv: add mode2 reset handling
Vangogh will use mode2 reset, so plumb it through the nv
soc driver.

Acked-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Huang Rui <ray.huang@amd.com>
2021-01-13 23:47:54 -05:00
Jack Zhang
3c2a01cb0f drm/amdgpu/sriov Stop data exchange for wholegpu reset
[Why]
When host trigger a whole gpu reset, guest will keep
waiting till host finish reset. But there's a work
queue in guest exchanging data between vf&pf which need
to access frame buffer. During whole gpu reset, frame
buffer is not accessable, and this causes the call trace.

[How]
After vf get reset notification from pf, stop data exchange.

Signed-off-by: Jingwen Chen <Jingwen.Chen2@amd.com>
Signed-off-by: Jack Zhang <Jack.Zhang1@amd.com>
Reviewed-by: Monk Liu <monk.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-13 23:47:39 -05:00
Emily.Deng
9882e27853 drm/amdgpu: Decrease compute timeout to 10 s for sriov multiple VF
For multiple VF, after engine hang,as host driver will first
encounter FLR, so has no meanning to set compute to 60s.

v2:
   Refine the patch and comment

Signed-off-by: Emily.Deng <Emily.Deng@amd.com>
Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-13 23:46:17 -05:00
Thomas Zimmermann
8f66090b7b drm/amdgpu: Remove references to struct drm_device.pdev
Using struct drm_device.pdev is deprecated. Convert amdgpu to struct
drm_device.dev. No functional changes.

v3:
	* rebased

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Sam Ravnborg <sam@ravnborg.org>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Christian König <christian.koenig@amd.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210107080748.4768-3-tzimmermann@suse.de
2021-01-13 09:02:58 +01:00
Thomas Zimmermann
8a11d28378 drm/amdgpu: Fix trailing whitespaces
Adhere to kernel coding style.

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
Reviewed-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Acked-by: Sam Ravnborg <sam@ravnborg.org>
Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: Christian König <christian.koenig@amd.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210107080748.4768-2-tzimmermann@suse.de
2021-01-13 09:02:50 +01:00
Nirmoy Das
453f617a30 drm/amdgpu: Resize BAR0 to the maximum available size, even if it doesn't cover VRAM
This allows BAR0 resizing to be done for cards which don't advertise
support for a size large enough to cover the VRAM but which do
advertise at least one size larger than the default. For example,
my RX 5600 XT, which advertises 256MB, 512MB and 1GB.

Signed-off-by: Darren Salt <devspam@moreofthesa.me.uk>
Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Nirmoy Das <nirmoy.das@amd.com>
Reviewed-by: Nirmoy Das <nirmoy.das@amd.com>
Link: https://patchwork.kernel.org/project/dri-devel/patch/20210107175017.15893-4-nirmoy.das@amd.com
2021-01-14 21:20:53 +01:00
Lee Jones
93a2ba14c9 drm/amd/amdgpu/vega20_ih: Add missing descriptions for 'ih' and fix spelling error
Fixes the following W=1 kernel build warning(s):

 drivers/gpu/drm/amd/amdgpu/vega20_ih.c:378: warning: Function parameter or member 'ih' not described in 'vega20_ih_get_wptr'
 drivers/gpu/drm/amd/amdgpu/vega20_ih.c:421: warning: Function parameter or member 'ih' not described in 'vega20_ih_irq_rearm'
 drivers/gpu/drm/amd/amdgpu/vega20_ih.c:447: warning: Function parameter or member 'ih' not described in 'vega20_ih_set_rptr'

Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: "Christian König" <christian.koenig@amd.com>
Cc: David Airlie <airlied@linux.ie>
Cc: Daniel Vetter <daniel@ffwll.ch>
Cc: Hawking Zhang <Hawking.Zhang@amd.com>
Cc: Feifei Xu <Feifei.Xu@amd.com>
Cc: amd-gfx@lists.freedesktop.org
Cc: dri-devel@lists.freedesktop.org
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-11 16:09:13 -05:00
Lee Jones
9c573cf255 drm/amd/amdgpu/amdgpu_ih: Update 'amdgpu_ih_decode_iv_helper()'s function header
Fixes the following W=1 kernel build warning(s):

 drivers/gpu/drm/amd/amdgpu/amdgpu_ih.c:220: warning: Function parameter or member 'ih' not described in 'amdgpu_ih_decode_iv_helper'
 drivers/gpu/drm/amd/amdgpu/amdgpu_ih.c:220: warning: Function parameter or member 'entry' not described in 'amdgpu_ih_decode_iv_helper'

Cc: Alex Deucher <alexander.deucher@amd.com>
Cc: "Christian König" <christian.koenig@amd.com>
Cc: David Airlie <airlied@linux.ie>
Cc: Daniel Vetter <daniel@ffwll.ch>
Cc: Felix Kuehling <Felix.Kuehling@amd.com>
Cc: amd-gfx@lists.freedesktop.org
Cc: dri-devel@lists.freedesktop.org
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-11 16:09:12 -05:00
Jiansong Chen
665fe4dce8 drm/amdgpu: enable gpu recovery for navy_flounder
Enable gpu recovery for navy_flounder by default to trigger
reset once needed.

Signed-off-by: Jiansong Chen <Jiansong.Chen@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-11 16:08:24 -05:00
Alexandre Demers
044a48f420 drm/amdgpu: fix DRM_INFO flood if display core is not supported (bug 210921)
This fix bug 210921 where DRM_INFO floods log when hitting an unsupported ASIC in
amdgpu_device_asic_has_dc_support(). This info should be only called once.

Bug: https://bugzilla.kernel.org/show_bug.cgi?id=210921
Signed-off-by: Alexandre Demers <alexandre.f.demers@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2021-01-08 15:18:57 -05:00
Victor Zhao
d1176dd5e3 drm/amdgpu/psp: fix psp gfx ctrl cmds
psp GFX_CTRL_CMD_ID_CONSUME_CMD different for windows and linux,
according to psp, linux cmds are not correct.

v2: only correct GFX_CTRL_CMD_ID_CONSUME_CMD.

Signed-off-by: Victor Zhao <Victor.Zhao@amd.com>
Reviewed-by: Emily.Deng <Emily.Deng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-08 15:18:31 -05:00
Emily.Deng
1eb2aae31e drm/amdgpu: Add new mode 2560x1440
Add one more 2k resolution which appears frequently in market.

Signed-off-by: Emily.Deng <Emily.Deng@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-08 15:18:05 -05:00
Daniel Vetter
18589d74f4 drm-misc-next for v5.12:
UAPI Changes:
 - Not necessarily one, but we document that userspace needs to force probe connectors.
 
 Cross-subsystem Changes:
 - Require FB_ATY_CT for aty on sparc64.
 - video: Fix documentation, and a few compiler warnings.
 - Add devicetree bindings for DP connectors.
 - dma-buf: Update kernel-doc, and add might_lock for resv objects in begin/end_cpu_access.
 
 Core Changes:
 - ttm: Warn when releasing a pinned bo.
 - ttm: Cleanup bo size handling.
 - cma-helper: Remove prime infix, and implement mmap as GEM CMA functions.
 - Split drm_prime_sg_to_page_addr_arrays into 2 functions.
 - Add a new api to install irq using devm.
 - Update panel kerneldoc to inline style.
 - Add DP support to drm/bridge.
 - Assorted small fixes to ttm, fb-helper, scheduler.
 - Add atomic_commit_setup function callback.
 - Automatically use the atomic gamma_set, instead of forcing drivers to declare the default atomic version.
 - Allow using degamma for legacy gamma if gamma is not available.
 - Clarify that primary/cursor planes are not tied to 1 crtc (depending on possible_crtcs).
 - ttm: Cleanup the lru handler.
 
 Driver Changes:
 - Add pm support to ingenic.
 - Assorted small fixes in radeon, via, rockchip, omap2fb, kmb, gma500, nouveau, virtio, hisilicon, ingenic, s6e63m0 panel, ast, udlfb.
 - Add BOE NV110WTM-N61, ys57pss36bh5gq, Khadas TS050 panels.
 - Stop using pages with drm_prime_sg_to_page_addr_arrays, and switch all callers to use ttm_sg_tt_init.
 - Cleanup compiler and docbook warnings in a lot of fbdev devices.
 - Use the drmm_vram_helper in hisilicon.
 - Add support for BCM2711 DSI1 in vc4.
 - Add support for 8-bit delta RGB panels to ingenic.
 - Add documentation on how to test vkms.
 - Convert vc4 to atomic helpers.
 - Use degamma instead of gamma table in omap, to add support for CTM and color encoding/range properties.
 - Rework omap DSI code, and merge all omapdrm modules now that the last omap panel is now a drm panel.
 - More refactoring of omap dsi code.
 - Enable 10/12 bpc outputs in vc4.
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Merge tag 'drm-misc-next-2020-12-17' of git://anongit.freedesktop.org/drm/drm-misc into drm-next

drm-misc-next for v5.12:

UAPI Changes:
- Not necessarily one, but we document that userspace needs to force probe connectors.

Cross-subsystem Changes:
- Require FB_ATY_CT for aty on sparc64.
- video: Fix documentation, and a few compiler warnings.
- Add devicetree bindings for DP connectors.
- dma-buf: Update kernel-doc, and add might_lock for resv objects in begin/end_cpu_access.

Core Changes:
- ttm: Warn when releasing a pinned bo.
- ttm: Cleanup bo size handling.
- cma-helper: Remove prime infix, and implement mmap as GEM CMA functions.
- Split drm_prime_sg_to_page_addr_arrays into 2 functions.
- Add a new api to install irq using devm.
- Update panel kerneldoc to inline style.
- Add DP support to drm/bridge.
- Assorted small fixes to ttm, fb-helper, scheduler.
- Add atomic_commit_setup function callback.
- Automatically use the atomic gamma_set, instead of forcing drivers to declare the default atomic version.
- Allow using degamma for legacy gamma if gamma is not available.
- Clarify that primary/cursor planes are not tied to 1 crtc (depending on possible_crtcs).
- ttm: Cleanup the lru handler.

Driver Changes:
- Add pm support to ingenic.
- Assorted small fixes in radeon, via, rockchip, omap2fb, kmb, gma500, nouveau, virtio, hisilicon, ingenic, s6e63m0 panel, ast, udlfb.
- Add BOE NV110WTM-N61, ys57pss36bh5gq, Khadas TS050 panels.
- Stop using pages with drm_prime_sg_to_page_addr_arrays, and switch all callers to use ttm_sg_tt_init.
- Cleanup compiler and docbook warnings in a lot of fbdev devices.
- Use the drmm_vram_helper in hisilicon.
- Add support for BCM2711 DSI1 in vc4.
- Add support for 8-bit delta RGB panels to ingenic.
- Add documentation on how to test vkms.
- Convert vc4 to atomic helpers.
- Use degamma instead of gamma table in omap, to add support for CTM and color encoding/range properties.
- Rework omap DSI code, and merge all omapdrm modules now that the last omap panel is now a drm panel.
- More refactoring of omap dsi code.
- Enable 10/12 bpc outputs in vc4.

Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/78381a4f-45fd-aed4-174a-94ba051edd37@linux.intel.com
2021-01-07 10:46:32 +01:00
Defang Bo
e4180c4253 drm/amdgpu: Add check to prevent IH overflow
Similar to commit <b82175750131>("drm/amdgpu: fix IH overflow on Vega10 v2").
When an ring buffer overflow happens the appropriate bit is set in the WPTR
register which is also written back to memory. But clearing the bit in the
WPTR doesn't trigger another memory writeback.

So what can happen is that we end up processing the buffer overflow over and
over again because the bit is never cleared. Resulting in a random system
lockup because of an infinite loop in an interrupt handler.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Defang Bo <bodefang@126.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-05 15:05:16 -05:00
John Clements
3e7bc83e31 drm/amdgpu: enable ras eeprom support for sienna cichlid
added I2C address and asic support flag

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: John Clements <john.clements@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-05 11:35:46 -05:00
Dennis Li
732f2a307c drm/amdgpu: fix no bad_pages issue after umc ue injection
old code wrongly used the bad page status as the function return value,
which cause amdgpu_ras_badpages_read always return failed.

Signed-off-by: Dennis Li <Dennis.Li@amd.com>
Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-05 11:35:33 -05:00
Jiawei Gu
0d232dada3 drm/amdgpu: fix potential memory leak during navi12 deinitialization
Navi12 HDCP & DTM deinitialization needs continue to free bo if already
created though initialized flag is not set.

Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Jiawei Gu <Jiawei.Gu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-05 11:35:26 -05:00
Alex Deucher
b8c415e3bf drm/amdgpu: take runtime pm reference when we attach a buffer
And drop it when we detach.  If the shared buffer is in vram,
we need to make sure we don't put the device into runtime
suspend.

Acked-by: Shashank Sharma <shashank.sharma@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-05 11:35:10 -05:00
Chenyang Li
956e20eb0f drm/amdgpu: Fix macro name _AMDGPU_TRACE_H_ in preprocessor if condition
Add an underscore in amdgpu_trace.h line 24 "_AMDGPU_TRACE_H".

Fixes: d38ceaf99e ("drm/amdgpu: add core driver (v4)")
Reviewed-by: Guchun Chen <guchun.chen@amd.com>
Reviewed-by: Paul Menzel <pmenzel@molgen.mpg.de>
Signed-off-by: Chenyang Li <lichenyang@loongson.cn>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2021-01-05 11:34:14 -05:00