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Author SHA1 Message Date
Hans de Goede
2ad815797e platform-drivers-x86 for v6.7-6
Fixes:
 - Intel PMC GBE LTR regression
 - P2SB / PCI deadlock fix
 
 The following is an automated shortlog grouped by driver:
 
 intel/pmc:
  -  Add suspend callback
  -  Allow reenabling LTRs
  -  Move GBE LTR ignore to suspend callback
 
 p2sb:
  -  Allow p2sb_bar() calls during PCI device probe
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Merge tag 'platform-drivers-x86-v6.7-6' into pdx86/for-next

Merge the 'platform-drivers-x86-v6.7-6' fixes into pdx86/for-next
so that the "Intel PMC GBE LTR regression" fixes can also be
applied to the new Arrow Lake and Lunar Lake platform support
code in pdx86/for-next .
2024-01-02 13:13:01 +01:00
David E. Box
70681aa074
platform/x86/intel/pmc: Move GBE LTR ignore to suspend callback
Commit 804951203a ("platform/x86:intel/pmc: Combine core_init() and
core_configure()") caused a network performance regression due to the GBE
LTR ignore that it added at probe. This was needed in order to allow the
SoC to enter the deepest Package C state. To fix the regression and at
least support PC10 during suspend, move the LTR ignore from probe to the
suspend callback, and enable it again on resume. This solution will allow
PC10 during suspend but restrict Package C entry at runtime to no deeper
than PC8/9 while a network cable it attach to the PCH LAN.

Fixes: 804951203a ("platform/x86:intel/pmc: Combine core_init() and core_configure()")
Signed-off-by: "David E. Box" <david.e.box@linux.intel.com>
Link: https://lore.kernel.org/r/20231223032548.1680738-6-david.e.box@linux.intel.com
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
2023-12-29 15:31:22 +02:00
David E. Box
6f9cc5c1f9
platform/x86/intel/pmc: Allow reenabling LTRs
Commit 804951203a ("platform/x86:intel/pmc: Combine core_init() and
core_configure()") caused a network performance regression due to the GBE
LTR ignore that it added during probe. The fix will move the ignore to
occur at suspend-time (so as to not affect suspend power). This will
require the ability to enable the LTR again on resume. Modify
pmc_core_send_ltr_ignore() to allow enabling an LTR.

Fixes: 804951203a ("platform/x86:intel/pmc: Combine core_init() and core_configure()")
Signed-off-by: "David E. Box" <david.e.box@linux.intel.com>
Link: https://lore.kernel.org/r/20231223032548.1680738-5-david.e.box@linux.intel.com
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
2023-12-29 15:31:15 +02:00
Rajvi Jingar
544f7b7f65 platform/x86/intel/pmc: Add regmap for Tiger Lake H PCH
Tiger Lake H PCH is same as Tiger Lake LP PCH from the driver
perspective with the addition of the PSON residency counter. Add regmap
for TGP H to add PSON register offsets for Tiger Lake H PCH.

Signed-off-by: Rajvi Jingar <rajvi.jingar@linux.intel.com>
Link: https://lore.kernel.org/r/20231219042216.2592029-3-rajvi.jingar@linux.intel.com
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2023-12-19 16:48:20 +01:00
Xi Pardee
2e35e3aa9f platform/x86:intel/pmc: Call pmc_get_low_power_modes from platform init
In order to setup a table of low power mode requirements for Meteor Lake,
pmc_core_get_low_power_modes() will need to be run from platform init code
so that the enabled modes are known, allowing the use of the
pmc_for_each_mode helper. Make the function global and call it from the
platform init code.

Signed-off-by: Xi Pardee <xi.pardee@intel.com>
Signed-off-by: David E. Box <david.e.box@linux.intel.com>
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Link: https://lore.kernel.org/r/20231129222132.2331261-12-david.e.box@linux.intel.com
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2023-12-04 14:53:43 +01:00
Xi Pardee
1c709ae12d platform/x86:intel/pmc: Add support to handle multiple PMCs
To support platforms with multiple PMCs, add a PMC device structure to
support each PMC instance.

Signed-off-by: Xi Pardee <xi.pardee@intel.com>
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Link: https://lore.kernel.org/r/20230613225347.2720665-4-rajvi.jingar@linux.intel.com
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2023-06-20 12:51:08 +02:00
Xi Pardee
804951203a platform/x86:intel/pmc: Combine core_init() and core_configure()
Combine core_init() and core_configure() functions to have a
cleaner setup for platforms.

Signed-off-by: Xi Pardee <xi.pardee@intel.com>
Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Link: https://lore.kernel.org/r/20230613225347.2720665-3-rajvi.jingar@linux.intel.com
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2023-06-20 12:51:08 +02:00
Andy Shevchenko
6ab983187d platform/x86: intel/pmc: Switch to use acpi_evaluate_dsm_typed()
The acpi_evaluate_dsm_typed() provides a way to check the type of the
object evaluated by _DSM call. Use it instead of open coded variant.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Rajneesh Bhardwaj <irenic.rajneesh@gmail.com>
Link: https://lore.kernel.org/r/20230118095440.41634-1-andriy.shevchenko@linux.intel.com
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2023-02-02 22:48:20 +01:00
Gayatri Kammela
92f530edd7 platform/x86: intel/pmc: Relocate Tiger Lake PCH support
Create tgl.c for Tiger Lake PCH specific structures and init().
This file supports Tiger Lake, Elkhart Lake, Rocket Lake,
Alder Lake mobile, Alder Lake N and Raptor Lake P platforms.
There are no functional changes involved.

Cc: David E Box <david.e.box@linux.intel.com>
Reviewed-by: "David E. Box" <david.e.box@linux.intel.com>
Signed-off-by: Gayatri Kammela <gayatri.kammela@linux.intel.com>
Signed-off-by: "David E. Box" <david.e.box@linux.intel.com>
Link: https://lore.kernel.org/r/20221114183257.2067662-7-gayatri.kammela@linux.intel.com
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2022-11-21 10:42:47 +01:00