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Author SHA1 Message Date
Thierry Reding
9ab9ecd83a ARM: tegra: Drop reg-shift for Tegra HS UART
When the Tegra High-Speed UART is used instead of the regular UART, the
reg-shift property is implied from the compatible string and should not
be explicitly listed.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-14 16:07:42 +01:00
Thierry Reding
1b5bad01ab ARM: tegra: Rename GPU node on Tegra124
In order to be able to pass DT schema validation, change the GPU nodes'
unit-address to the standard notation. Previously this was using a "0,"
prefix that originated from a time when the top-level device tree node
contained #address-cells = <2>.

Note that this technically breaks backwards-compatibility with certain
older versions of the U-Boot bootloader because early versions used a
hard-coded DT path lookup to find the GPU node and perform some fixups
on it. However, this was changed to a compatible string based lookup in
April 2016, so it's reasonable to expect people to update U-Boot on the
systems that they want to use this updated kernel DTB with.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-14 16:07:42 +01:00
Thierry Reding
63658cbc66 ARM: tegra: Rename GPIO hog nodes to match schema
GPIO hog nodes must have a "hog-" prefix or "-hog" suffix according to
the DT schema. Rename all such nodes to allow validation to pass.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-14 16:07:42 +01:00
Thierry Reding
82d03bec4e ARM: tegra: Add #reset-cells for Tegra114 MC
The Tegra memory controller provides reset controls for hotflush reset,
so the #reset-cells property must be specified.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-14 16:07:42 +01:00
Thierry Reding
f8d5db7e27 ARM: tegra: Fix compatible string for Tegra114+ timer
The TKE (time-keeping engine) found on Tegra114 and later is no longer
backwards compatible with the version found on Tegra20, so update the
compatible string list accordingly.

Note that while the hardware block is strictly backwards-compatible, an
architectural timer exists on those newer SoCs that is more reliable, so
that should always be preferred.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-14 16:07:42 +01:00
Dmitry Osipenko
c629196d04 ARM: tegra: Rename top-level regulators
Regulators defined at the top level in device tree are no longer part of
a simple bus and therefore don't have a reg property. Nodes without a
reg property shouldn't have a unit-address either, so drop the unit
address from the node names. To ensure nodes aren't duplicated (in which
case they would end up merged in the final DTB), append the name of the
regulator to the node name.

[treding@nvidia.com: factored out patch and wrote commit message]
Signed-off-by: David Heidelberg <david@ixit.cz>
Co-developed-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-14 16:05:25 +01:00
David Heidelberg
4f74ed817e ARM: tegra: Rename top-level clocks
Clocks defined at the top level in device tree are no longer part of a
simple bus and therefore don't have a reg property. Nodes without a reg
property shouldn't have a unit-address either, so drop the unit address
from the node names. To ensure nodes aren't duplicated (in which case
they would end up merged in the final DTB), append the name of the clock
to the node name.

[treding@nvidia.com: factored out patch and wrote commit message]
Signed-off-by: David Heidelberg <david@ixit.cz>
Co-developed-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-14 16:05:25 +01:00
Thierry Reding
0b9f3940d6 ARM: tegra: Rename SPI flash chip nodes
SPI flash chip nodes should be named "flash" instead of "spi-flash".

Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-14 16:05:25 +01:00
Thierry Reding
0a6a64f904 ARM: tegra: Specify correct PMIC compatible on Tegra114 boards
The PMIC found on Dalmore, TN7 and Roth is a TPS65913, so add the
specific compatible string in addition to the generic Palmas series
compatible string.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-14 16:05:24 +01:00
Thierry Reding
0714ccb54c ARM: tegra: Clean up external memory controller nodes
The external memory controller should be sorted after the memory
controller to keep the ordering by unit-address intact.

Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-12-14 16:05:24 +01:00
Christoph Niedermaier
cbcf2b40a7 ARM: dts: imx6qdl-dhcom: Identify the PHY by ethernet-phy-id0007.c0f0
Identify the PHY by its compatible ID value. In some cases during
boot, the PHY needs to be reset to be accessible, but this is only
possible if the PHY is recognized. In that case, the automatic
detection of the PHY does not work and a static compatible ID
value is need.

Signed-off-by: Christoph Niedermaier <cniedermaier@dh-electronics.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Marek Vasut <marex@denx.de>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: kernel@dh-electronics.com
To: linux-arm-kernel@lists.infradead.org
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-12-14 16:29:54 +08:00
Christoph Niedermaier
e7ed6ba023 ARM: dts: imx6qdl-dhcom: Align PHY reset timing with other DHCOM SoMs
According to datasheet Microchip LAN8710A/LAN8710Ai DS00002164B [1]
the reset should stay asserted for at least 100uS and software
should wait at least 200nS. On other DHCOM SoMs with the SMSC
LAN8710Ai PHY both reset delays are 500us. This should be plenty
and for consistency, the i.MX6 SoM should also use these delays.

[1] https://ww1.microchip.com/downloads/en/DeviceDoc/00002164B.pdf

Signed-off-by: Christoph Niedermaier <cniedermaier@dh-electronics.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Marek Vasut <marex@denx.de>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: kernel@dh-electronics.com
To: linux-arm-kernel@lists.infradead.org
Reviewed-by: Fabio Estevam <festevam@denx.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-12-14 16:29:23 +08:00
Arnd Bergmann
2aaeccfafb IXP4xx DTS changes for v5.17:
- Add the LEDs to the Freecom FSG-3 that were missing.
 - Add a devicetree for the Gorami MultiLink Router
 - Add a devicetree for the Gateway GW7001 Router
 
 This completes the migration of all IXP4xx devices to
 device tree files.
 
 Next merge window we will delete the remaining board files,
 it cannot be done now because of cross-tree dependencies.
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEElDRnuGcz/wPCXQWMQRCzN7AZXXMFAmG34tsACgkQQRCzN7AZ
 XXN4ZxAAvGLWHQQskEKIuwxjoFYstku52Wxg2eyBUgTEVfu1hSYWhzVfS1R216D1
 fySzBkGprctHw8hoMDEZFFjd9zkpeS17Y0evAq9qka7I1pnZTHAhLYGG/jeLd15Y
 xCTSDk+6Z2RGRjRC3NkRuxog9st7/EnJaDVInV5GuyA0Nev4s1nqgY6TfWNabhcY
 NvRnrF55JK7KAELRsFMTbYvSqNe65w7hunysOIUPTalaGWA9DtPcm27aavzYiNgi
 q1TBRorkQLV10TH3PWRPu7uVK/YqBIqrf3RzT6X/XfKk0SPg99eQguSt8kZ1U3HA
 ao3uo9F1I9HYbxgfNvLrWRRh/PIoAnD2kHzfAKTH5xWrPpLOc3JDsLHorFh3p6+n
 HJIZzQQwcLV/atFRa/hb3r61hwOVArx5svtk2g/6ELj9BU/3zOc0wFffYc5fhSAd
 +SGMdx2PC08JTYvMm8dxp/zt2ItqnqO716TcPpX5bUUEg1jttp8HQJNXxPNTlFNT
 AsfhC6jhEXfgGgeJf3iEEzmfYCqb0GWm6oRVynzLanr+MHQNNcHdMKl9CKnU/VS4
 HOP2e+DCh51eD7H2CENIuEDjpOuSdp5dh7oFZGmjvqWbJcc/2lAHAWVEOz8aKQJl
 4LGUToHCc/+J63eS1a33tjAaBpGa5ELmH16ejRbrfk9S+YJ9P/I=
 =Hzm2
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmG4TLkACgkQmmx57+YA
 GNlbng/9HC5diwBTMoedWFQq8aGmX64sp5/iFvQNQIuUjfRBMQ9Wpkv5C30oJA4B
 hoag6GBN4j7hjTJ+h5xR3ojUE7UKxKvPHHmoKZavDS89PvYo8MiH0Z7+pAJMv6KA
 +6/FqfUt0Ki/UwI5IetzNmBnn175kartGSPxOdE8GJm94hJz4h2z2QpOdp9kLQs8
 MBvuQjWKI5zub5a/HNwjwIBtLXuk7pRKSrMBJSB4bds1JypycIFBRW/xF/HVKlXt
 lPvS3xN/gT/fgXmyp2Hb2LMlSHIifPSVsGSRhllDiOS5QI98M03P+zG0sAzmaXkc
 y8GSB+Da+HsxnfYg0J65ByvfSypBjOfDM6RXTSm/PzhU2JPTHgneT43TnzrDvtBK
 J4wmrGNM0N7cwVlk8FhWarve1jgnbzVdE7TblZoDX0s4Ioe8yGEhWZudOA4EvCYd
 DDoRGInifvNL8QYakUUNYTinx5ae5xr1AiazUdiLPc8LMx2Kec9BNawWdTBEn8hB
 tjZa4Il8NpLacjI8+FVoQeO9uiC7LV9mIPZyHD1KRKHSr1oU6gKS+NUr2ivc+UDl
 MhCQCyWF7S9YsWISCtEzi29NvA2vdDqyIZ4s+YIYl7rEKS9WCkiww2H38pRUu8x4
 QQVpWxwc3jLdwva4i+MayiAc1nMfhKS/rkAX3hJ4xPK5iAmOrwE=
 =LdLA
 -----END PGP SIGNATURE-----

Merge tag 'ixp4xx-dtx-v5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into arm/dt

IXP4xx DTS changes for v5.17:

- Add the LEDs to the Freecom FSG-3 that were missing.
- Add a devicetree for the Gorami MultiLink Router
- Add a devicetree for the Gateway GW7001 Router

This completes the migration of all IXP4xx devices to
device tree files.

Next merge window we will delete the remaining board files,
it cannot be done now because of cross-tree dependencies.

* tag 'ixp4xx-dtx-v5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik:
  ARM: dts: ixp4xx: Add devicetree for Gateway 7001
  ARM: dts: Add Goramo MultiLink device tree
  ARM: dts: Add FSG3 system controller and LEDs

Link: https://lore.kernel.org/r/CACRpkdYiWK7TEbZrh4_0WT5obMk=ZSc7AQVUSPXL+-uZ_hsUEA@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-14 08:50:17 +01:00
Giulio Benetti
bca46d8e5f ARM: dts: imx6qdl: drop "fsl,imx-ckih1"
"fsl,imx-ckih1" is useless since no driver deals with it, so let's drop it.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-12-14 11:23:17 +08:00
Giulio Benetti
5368f930cc ARM: dts: imx6qdl: drop "fsl,imx-ckil"
"fsl,imx-ckil" is useless since no driver deals with it, so let's drop it.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-12-14 11:23:15 +08:00
Giulio Benetti
36b85fdaa3 ARM: dts: imx6qdl: drop "fsl,imx-osc"
"fsl,imx-osc" is useless since no driver deals with it, so let's drop it.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-12-14 11:23:12 +08:00
Giulio Benetti
4ce956128d ARM: dts: imx53: drop "fsl,imx-ckih2"
"fsl,imx-ckih2" is useless since no driver deals with it, so let's drop it.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-12-14 11:23:10 +08:00
Giulio Benetti
917fee9c6f ARM: dts: imx53: drop "fsl,imx-ckih1"
"fsl,imx-ckih1" is useless since no driver deals with it, so let's drop it.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-12-14 11:23:07 +08:00
Giulio Benetti
ac0894359e ARM: dts: imx53: drop "fsl,imx-ckil"
"fsl,imx-ckil" is useless since no driver deals with it, so let's drop it.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-12-14 11:23:04 +08:00
Giulio Benetti
39cd25fe2e ARM: dts: imx53: drop "fsl,imx-osc"
"fsl,imx-osc" is useless since no driver deals with it, so let's drop it.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-12-14 11:23:02 +08:00
Giulio Benetti
0dee2e69ef ARM: dts: imx51: drop "fsl,imx-ckih2"
"fsl,imx-ckih2" is useless since no driver deals with it, so let's drop it.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-12-14 11:22:59 +08:00
Giulio Benetti
58cd720f3f ARM: dts: imx51: drop "fsl,imx-ckih1"
"fsl,imx-ckih1" is useless since no driver deals with it, so let's drop it.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-12-14 11:22:57 +08:00
Giulio Benetti
929bdb7b0a ARM: dts: imx51: drop "fsl,imx-ckil"
"fsl,imx-ckil" is useless since no driver deals with it, so let's drop it.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-12-14 11:22:54 +08:00
Giulio Benetti
73cda7c63a ARM: dts: imx51: drop "fsl,imx-osc"
"fsl,imx-osc" is useless since no driver deals with it, so let's drop it.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-12-14 11:22:52 +08:00
Giulio Benetti
f6bc4a7c03 ARM: dts: imx50: drop "fsl,imx-ckih2"
"fsl,imx-ckih2" is useless since no driver deals with it, so let's drop it.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-12-14 11:22:49 +08:00
Giulio Benetti
c522683be5 ARM: dts: imx50: drop "fsl,imx-ckih1"
"fsl,imx-ckih1" is useless since no driver deals with it, so let's drop it.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-12-14 11:22:46 +08:00
Giulio Benetti
c5e526a9c3 ARM: dts: imx50: drop "fsl,imx-ckil"
"fsl,imx-ckil" is useless since no driver deals with it, so let's drop it.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-12-14 11:22:43 +08:00
Giulio Benetti
20adb4921c ARM: dts: imx50: drop "fsl,imx-osc"
"fsl,imx-osc" is useless since no driver deals with it, so let's drop it.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-12-14 11:22:41 +08:00
Giulio Benetti
9a68c8ec9a ARM: dts: imx25: drop "fsl,imx-osc"
"fsl,imx-osc" is useless since no driver deals with it, so let's drop it.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-12-14 11:22:38 +08:00
Giulio Benetti
05be8e7472 ARM: dts: imx1: drop "fsl,imx-clk32"
"fsl,imx-clk32" is useless since no driver deals with it, so let's drop it.

Signed-off-by: Giulio Benetti <giulio.benetti@benettiengineering.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-12-14 11:22:24 +08:00
Laurent Pinchart
3f8b6cf820 ARM: dts: imx7: Group mipi_csi 'port' children in a 'ports' node
The nxp,imx7-mipi-csi2.yaml binding requires ports to be grouped in a
ports node, as multiple ports are present. Fix imx7s.dtsi and the only
board file that references the mipi_csi ports.

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-12-14 11:16:31 +08:00
Laurent Pinchart
473d06b909 ARM: dts: imx7: Drop reset-names property for mipi_csi node
The reset-names property isn't defined by the nxp,imx7-mipi-csi2.yaml
binding, and isn't used by the corresponding driver as it acquires the
reset with a NULL ID. Drop it.

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-12-14 11:16:29 +08:00
Laurent Pinchart
74092acd6e ARM: dts: imx7s-warp: Drop undefined property in mipi_csi node
The fsl,csis-hs-settle property isn't defined by the
nxp,imx7-mipi-csi2.yaml binding, and isn't parsed by the corresponding
driver. Drop it.

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-12-14 11:16:11 +08:00
Adam Ford
b357ffd860 ARM: dts: imx: Change spba to spba-bus
With the updated dt-bindings for the spba-bus, rename spba@xxxx
to spba-bus@xxxx.  There are no functional changes.

Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-12-14 10:45:47 +08:00
Arnd Bergmann
7b7320905a AT91 DT #1 for 5.17:
- 2 low priority fixes about pin function for sama7g5 and better
   tailored mmc interface on sama5d2 xplained
 - Addition of the Microchip EVB-KSZ9477: a Gigabit Ethernet
   managed Switch Evaluation Board
 - QSPI: addition of sama5d2 clock name and nodes for new sama7g7 and its
   associated Evaluation Kit
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYIAB0WIQQ5TRCVIBiyi/S+BG4fOrpwrNPNDAUCYbdvvAAKCRAfOrpwrNPN
 DBVFAP9n8QGFvjmhgc5MjMp7cfYziVlRTXW16rejmVHXZIGMOgD/dTj3jffyVGQK
 +n9vhUqa+apnVjufzwvy0RpMzRc+iwY=
 =8QU6
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmG31GEACgkQmmx57+YA
 GNnf4Q/+MX+YxLrWF8je8d6G4L45iZ45KIvwpxTf+mxCW3wdhg02USEieGw4XSoB
 aph2EZ1nugRP1Skwg5C3xIHn1SXrWRk9LAyJ5QK1HLEr3VOEW014jT95Nv92WDI5
 Q46wlieTYQD/J5wmBdaTW+OWCa/SkX7KRf9GoopVJ5WHdDJzpFYpPkyZnBs2mFig
 feoKvtR151X4noCrGrew8Yp3ASX6OGueQVEGfNUwiWUamfIZr+PRfLH/SZMYUPmB
 zZfpfS0y7KW2kCku7vq7rqQRAI224yaQfutkt5D9CWYWiZO/lCbljYv0EbuCyZBy
 xfQswSEmr57XQaWo5GPa6jU6QZFYWn4k5eqKKnwenOFijWn3REcB2PrPZxnrdlKy
 50v64wQqF1p0MVsZhh0LHioQLRNm1z0uhdmO1XCPjX43VPkbjxbMkzcV9wh7P6Hr
 C2Zyj5CRMsPVV3wC7euQQ2AMQgHEkUAO6TFdnWLqO4AbGx3YWP7zbPpxcl2+oks/
 eQNpkY6CTZsnm7BqvX+xytZqJ1qUs6lEqQkrQ/5wBC+bLTD6EVncRhXX3G1uWdrT
 ARozLdSb6l9UcAwNxHKB4+KOGjGKALILt5AZtfkro4cLu3Iwep9BaRx9+4Drj7UK
 R+/UD9SNiMHEw014H22jLgAo6+hPDWsDNdGAnQ+gEpugK1BzlsU=
 =aUEQ
 -----END PGP SIGNATURE-----

Merge tag 'at91-dt-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/dt

AT91 DT #1 for 5.17:

- 2 low priority fixes about pin function for sama7g5 and better
  tailored mmc interface on sama5d2 xplained
- Addition of the Microchip EVB-KSZ9477: a Gigabit Ethernet
  managed Switch Evaluation Board
- QSPI: addition of sama5d2 clock name and nodes for new sama7g7 and its
  associated Evaluation Kit

* tag 'at91-dt-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
  ARM: dts: at91: sama7g5ek: Add QSPI0 node
  ARM: dts: at91: sama7g5: Add QSPI nodes
  ARM: dts: at91: sama5d2: Name the qspi clock
  ARM: dts: at91: add Microchip EVB-KSZ9477 board
  ARM: dts: at91: sama5d2_xplained: remove PA11__SDMMC0_VDDSEL from pinctrl
  ARM: dts: at91: update alternate function of signal PD20

Link: https://lore.kernel.org/r/20211213161451.90786-1-nicolas.ferre@microchip.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-14 00:16:49 +01:00
Stephan Gerhold
a6839c42fe ARM: dts: qcom: Build apq8016-sbc/DragonBoard 410c DTB on ARM32
The DragonBoard 410c is a convenient device for testing and debugging.
Since there is support for using ARM32 kernels on MSM8916 now, also
build the DB410c DTB on ARM32 so it can be used for testing. ARM64
is still the main supported architecture for DB410c but it actually
works great on ARM32 as well.

The "apq8016-sbc.dts" is simply included as-is from ARM64 similar
to the approach used for Raspberry Pi (e.g. bcm2711-rpi-4-b.dts).

Signed-off-by: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211213113250.4249-1-stephan@gerhold.net
2021-12-13 16:51:46 -06:00
Christian Lamparter
4754eab7e5
ARM: dts: gemini: NAS4220-B: fis-index-block with 128 KiB sectors
Steven Maddox reported in the OpenWrt bugzilla, that his
RaidSonic IB-NAS4220-B was no longer booting with the new
OpenWrt 21.02 (uses linux 5.10's device-tree). However, it was
working with the previous OpenWrt 19.07 series (uses 4.14).

|[    5.548038] No RedBoot partition table detected in 30000000.flash
|[    5.618553] Searching for RedBoot partition table in 30000000.flash at offset 0x0
|[    5.739093] No RedBoot partition table detected in 30000000.flash
|...
|[    7.039504] Waiting for root device /dev/mtdblock3...

The provided bootlog shows that the RedBoot partition parser was
looking for the partition table "at offset 0x0". Which is strange
since the comment in the device-tree says it should be at 0xfe0000.

Further digging on the internet led to a review site that took
some useful PCB pictures of their review unit back in February 2009.
Their picture shows a Spansion S29GL128N11TFI01 flash chip.

>From Spansion's Datasheet:
"S29GL128N: One hundred twenty-eight 64 Kword (128 Kbyte) sectors"
Steven also provided a "cat /sys/class/mtd/mtd0/erasesize" from his
unit: "131072".

With the 128 KiB Sector/Erasesize in mind. This patch changes the
fis-index-block property to (0xfe0000 / 0x20000) = 0x7f.

Fixes: b5a923f8c7 ("ARM: dts: gemini: Switch to redboot partition parsing")
Reported-by: Steven Maddox <s.maddox@lantizia.me.uk>
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Tested-by: Steven Maddox <s.maddox@lantizia.me.uk>
Link: https://lore.kernel.org/r/20211206004334.4169408-1-linus.walleij@linaro.org'
Bugzilla: https://bugs.openwrt.org/index.php?do=details&task_id=4137
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-13 23:48:02 +01:00
Florian Fainelli
3aee738a3d Uwe Kleine-König adds offsets to GPIO line names array for better
readability.
 -----BEGIN PGP SIGNATURE-----
 
 iQEzBAABCAAdFiEErOkkGDHCg2EbPcGjlfZmHno8x/4FAmG3OAQACgkQlfZmHno8
 x/7m+QgAmZyN7Qvk5OXRRDBtuGrGrnBbtaUpVpXJ/y9SHpae8g3uTY4M4S9dMRuk
 7c/xYfaAEPrnIEtRNqRcyzfpZxtvpGFenfBl60IWaAGwQHhsXygScQYtciRkpGGp
 OXSpw7mjEo26FVZcu8KqPQ6kSYUQXNRMwux6pfISJD3N/LqqAqislUjM7UzL8WY8
 x594Dpu/Ie9Uh9Dp/MOnCf5pFXyTu8W/VJ6CQwZl/z9Ci4J76S/CwDPJu+IfDj/P
 oraHyYoXOhyKbgTohfWeQ8Na1Y4H/GvOV6hq0xex60Hqb/TcCNyaKL3tKIEudUh7
 qLa8IlZXZU6LZcAROt4mPM5SNfDx2Q==
 =JmTV
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEm+Rq3+YGJdiR9yuFh9CWnEQHBwQFAmG3q1YACgkQh9CWnEQH
 BwSqhw//S706+j6Ov8Dg/4Pao2WWGWA+aQKa0rL4PB3MNMIagSZhVEWRnwbGsRqZ
 JEeGYg2jOOlHRAwcC8gbaiSJusmbZwi/ZcZvy1S9ng4SkdL13b5FxtLmnJVzaBQH
 hp0a641uGxdH+tpxfMfpCSDG45t6g4a1pT0bp7bthtdf0aSid+9kQR3oJnL1Ffrn
 WQHXMBH9xNZl9+AFVBSOaLrb/FoDPX2pV25FGgO4R/bwj/Of9gv/djF+ZHJ90Q2f
 8URmWZBweyV1epEH6fc8twR5XZM4Dry/6x2ZpTtb3FbIxUvRgi1VwzZbVPJ3N1F0
 ADFRSaGmo3Otr/ebBgzyCzMw0o4hVUbz79RwB8O5Pa67YxzorioyHWplJWUbyOdh
 KzeTuDCIYPOEZoTClUEkEGM7hcYLoIRIuotSwMgDHj5Jln3QxD4co4TpFPY19PLS
 Xe4en4ZBCJr3X2qm/MbA49CvEbmgCxVGeqeICQ7nJD+Fv29npum/3CZX3yrUScs5
 lPvbeBxrlKJ7x3Pob+4F4d2AEQpEC2dvOyu2EyA76oRLch56c79AockkxTnDC2qR
 DP70Uh9ewsjvFzB2eFtX0iDiVJHiiRm8Y9tm8f0XggKUHW71+XtDQAi6gMHyGiwe
 Pp0B9gwc+CWZOtslbIxN39w4IOGJWE+pUB3PiGOxnEAgbV9V3Gk=
 =sodQ
 -----END PGP SIGNATURE-----

Merge tag 'tags/bcm2835-dt-next-2021-12-13' into devicetree/next

Uwe Kleine-König adds offsets to GPIO line names array for better
readability.

Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2021-12-13 12:21:33 -08:00
Arnd Bergmann
b9ca111fae Ux500 DTS updates for the v5.17 kernel series:
- Add reset lines to applicable IP blocks
 - Fix the magnetometer in the Gavini device tree
 -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEElDRnuGcz/wPCXQWMQRCzN7AZXXMFAmGsuYUACgkQQRCzN7AZ
 XXONLg//cLHfQrebFwVJnK378OxZA4P5rfAfkr5QhhPzdzYctM/0zkwWH9QpJJy5
 BgW77Ok5tngMd3mrcRdZqryRdwwzKEujuHMYXnshEUrmAo06XvsTD15ZL8fZFUWs
 Q8cY+osnoykRnUuV/3oPTV4nY5t+wiMmup4SPslrot4O5znMqfmMWF9NkJzuyAvI
 92dIdjcXPsnJ5tLSFUOA8+lrciVQC07FUbZUvXIuR4IFKALy3jSoSI3FU99A6ae6
 42K4bm4pdKy2r0lNJcIFvXIpATFx/kPxhgp795pC1T0O4jJ4Al9fo4aEKSXoqAVF
 +Et/yVgFoqzvDtLrFZAdZQcQRY5d93SI2ZpxRXzkS+AbU2H4tUyESG/EM9T/ePdT
 FrpL37ncgduUnbBnomSeW1mhg38ixSRI8m5EabHjBCCR+XEEnxoFllMjQNIgb/TZ
 rhsNAJXpugfUJS6/awzbHpSkrQLOqgKIy4TzIwYW4+pziGenrc1OS9hryfJLV3vB
 EA97jEu0YYCYpy3ty9s6IB060qpzO4V8LNaDCqPNoazG5GMQi3QuqFcLLKnavFeJ
 s5dW1XMDjOCbzTpzshoZsOYqe1RnvctWV2MTSctZtMFwEnJNM9BQ5WUNfRPkzu0q
 KEBZ8M4EZfemmEftikfYXZLymOiJocrFTmmE5s21ezGBKdWMNq8=
 =n8Dv
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmG3pkQACgkQmmx57+YA
 GNnc7xAApJj85DoUdxeTLTMgXIbvr39d7AHdN+4ZYevl6cKBkM3RZrTj2l66qo02
 0ZMc536M0veE0/y9M3O/ijP915hjIQZ6IJr6CQD2HowW/e9b2BDYUp6LO2/Hk8Rr
 P1zgiXKYOb7PtZ1Q3Fw775O5Kt17XmtbEXlfYW9RA3ar3AQQ1SnI8NFdF7TLy1fa
 HouMXEI8gXQCQ0Q6KN+rPqg6siczA4hcDL9w8o0yl5mgX5jT2rWe3k2yHDVYKYq9
 qUv4wfU4axOivYniDNkhWEEr77y8J86clUwSE/3voDuZbP7aUi20/9hwdmdALWzn
 /3xpmiHVrlfSF3IYwG7OMoO+eli92CnPYBSzgeHYXfAGWSAgIuhqtry0Qj/N4jMc
 uCFeNeahn0+NzyGV0YERQVKhCa4qOKUkWCPeZ0+QWMI6fQTVVhvZnWtm3ptreYWq
 DAxiFRN3T4sJnAN+IvmOKhrBpJ/Bcq6ym3wFztOaDSuWsO2w+mGB6rM14qCMslHm
 GBSKDjFaahjRBN5y0YZr4ZN/7uaveZbGzkjtgM6pANKupkDMEdcSxAppCBoLRbqg
 /QiO1/FQK+DMG5fbdiQUbFisoSo3eYWABq4203IvU5QDQD2HtRLibCVm65TaevjU
 v2bMHkB7qCoJArjHbawo1fbjQIAnbZ/lShzZ1TZ4uVoe/jA0LOI=
 =9+jA
 -----END PGP SIGNATURE-----

Merge tag 'ux500-dts-v5.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into arm/dt

Ux500 DTS updates for the v5.17 kernel series:

- Add reset lines to applicable IP blocks
- Fix the magnetometer in the Gavini device tree

* tag 'ux500-dts-v5.17-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik:
  ARM: dts: ux500: Fixup Gavini magnetometer
  ARM: dts: ux500: Add reset lines to IP blocks

Link: https://lore.kernel.org/r/CACRpkdZuDPLj5Tcxbyd+JGfvBGQ8RuMP9PAsGsZT7pY8KoyOKg@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-13 21:00:04 +01:00
Arnd Bergmann
ee58c0a4d7 Renesas ARM DT updates for v5.17
- Serial, SPI, timer, watchdog, operating points, and QSPI FLASH
     support for the RZ/G2L SoC and the RZ/G2L SMARC EVK development
     board,
   - SDHI SDnH clocks for the R-Car Gen3 and RZ/G2 SoCs,
   - Display Unit support for the R-Car V3U SoC,
   - Miscellaneous fixes and improvements.
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCYanw/AAKCRCKwlD9ZEnx
 cG7ZAQCFO3hNw7+CddeFyWUPYC0x9b5HdltoUAMR5PHlcloGLwD/QhQ0jLvBL6dO
 v0eDzojuXuoL+hOaFy/Gx/fqOCGHfQo=
 =wEq9
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmG3pU0ACgkQmmx57+YA
 GNmwhA//SWMFcs+GqXDfaxC6L8OnBeI43nHupf1vY/F0HpTethHixCN9cgC4isc/
 EWp2RnWLZc1b0UaCXv8T2yNRo6Ey7obcxR+6ReyFyH/Oovd6f61b9hl8kEvESko9
 n9Jfr4Mz0nMesSTycracK+TOTG/FKIjRtGB7VGo1+BmLHHyNLpG500ebItbFW4ht
 d79/z3Ts2u37EqpsGEbX6KeR9WG7UPTWzxFv8TdlluqLe27MlZKuZ1PcSXt+Vx0I
 vXs/aWvGqT/enWeMF22OjkdDo5+4YBEvfSY7SEwzLNm8U1NNr6gopbw1k8BFbjBB
 i4Va1KBjRdQHO5WFPZtL9eMjOWLapoSx6f/AAScTSk9/ylFcMjbziRzsOYTFCNae
 HJTgxynJMDVY90G8oFrLKOgMaqz7F3gM35IH6K7UDu8WCANlQV5Pih+kp3TDF8Sz
 84eYzKIVQ+E+EktU7xM7rxmclNSqBeC7/x1jHAMcJEmJ3/7VVeUhnYGcitp5Afzl
 QtOveCESlfCMK29E+3SKrv0/StXOyNy2bs3QdiiTmaizSs7CGlpY9TzcsGliqUCt
 s4+ABhs90b8ssiBMybEixxvIQD2PvgKv7LamE1neV/EMwC4eBtUKJMnnZkgK5cYC
 8a1mPstIasR4dk20pkGCIERvGX//cIPC9JIX7l+qXDi5f9Mn8aE=
 =Vjlr
 -----END PGP SIGNATURE-----

Merge tag 'renesas-arm-dt-for-v5.17-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt

Renesas ARM DT updates for v5.17

  - Serial, SPI, timer, watchdog, operating points, and QSPI FLASH
    support for the RZ/G2L SoC and the RZ/G2L SMARC EVK development
    board,
  - SDHI SDnH clocks for the R-Car Gen3 and RZ/G2 SoCs,
  - Display Unit support for the R-Car V3U SoC,
  - Miscellaneous fixes and improvements.

* tag 'renesas-arm-dt-for-v5.17-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (21 commits)
  arm64: dts: renesas: r8a779a0: Add DU support
  arm64: dts: renesas: salvator-common: Merge hdmi0_con
  arm64: dts: renesas: ulcb: Merge hdmi0_con
  arm64: dts: renesas: r9a07g044: Add OPP table
  arm64: dts: renesas: Fix operating point table node names
  arm64: dts: renesas: rzg2l-smarc-som: Enable watchdog
  arm64: dts: renesas: r9a07g044: Add WDT nodes
  arm64: dts: renesas: r9a07g044: Rename SDHI clocks
  arm64: dts: renesas: rzg2l-smarc-som: Enable serial NOR flash
  arm64: dts: renesas: rzg2l-smarc-som: Enable OSTM
  arm64: dts: renesas: r9a07g044: Add OSTM nodes
  arm64: dts: renesas: r9a07g044: Sort psci node
  arm64: dts: renesas: rzg2l-smarc: Enable RSPI1 on carrier board
  arm64: dts: renesas: r9a07g044: Add RSPI{0,1,2} nodes
  arm64: dts: renesas: cat875: Add rx/tx delays
  arm64: dts: reneas: rcar-gen3: Add SDnH clocks
  arm64: dts: reneas: rzg2: Add SDnH clocks
  arm64: dts: renesas: r9a07g044: Add SCI[0-1] nodes
  arm64: dts: renesas: rzg2l-smarc: Enable SCIF2 on carrier board
  arm64: dts: renesas: r9a07g044: Add SCIF[1-4] nodes
  ...

Link: https://lore.kernel.org/r/cover.1638530606.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-13 20:55:57 +01:00
Herve Codina
7cf4cc3e85 ARM: dts: spear3xx: Add spear320s dtsi
The SPEAr320s SOC is a SPEAr320 SOC variant.

Mostly identical to the SPEAr320 SOC variant, it has a
new interrupt routing for PL_PGIOs.

Add spear320s.dtsi to handle SPEAr320s SOC

Signed-off-by: Herve Codina <herve.codina@bootlin.com>
Link: https://lore.kernel.org/r/20211202095255.165797-7-herve.codina@bootlin.com'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-13 17:13:54 +01:00
Herve Codina
5d7248e956 ARM: dts: spear3xx: Use plgpio regmap in SPEAr310 and SPEAr320
Resources used by plgpio and pinmux are conflicting on SPEAr310
and SPEAr320.

Use the newly introduced regmap property in plgpio node to use
pinmux resources from plgpio and so avoid the conflict.

Signed-off-by: Herve Codina <herve.codina@bootlin.com>
Link: https://lore.kernel.org/r/20211202095255.165797-5-herve.codina@bootlin.com'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-13 17:13:54 +01:00
Arnd Bergmann
e3c68ab17b i.MX fixes for 5.16, round 2:
- One fix on imx8m-blk-ctrl driver to get i.MX8MM MIPI reset work
   properly
 - Fix CSI_DATA07__ESAI_TX0 pad name in i.MX7ULL pin function header
 - Remove interconnect property from i.MX8MQ LCDIF device to fix the
   regression that LCDIF driver stops probe, because interconnect
   provider driver (imx-bus) hasn't been fully working.
 - Fix soc-imx driver to register SoC device only on i.MX platform.
 -----BEGIN PGP SIGNATURE-----
 
 iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAmG0BOsUHHNoYXduZ3Vv
 QGtlcm5lbC5vcmcACgkQUFdYWoewfM6BFAgArJtx8QmpSgBGPXfWtvu5F63J2lfy
 aTBuXvLQACly80yWwTsm0GLvtc8nKDsPIU6PodfL8OPHEG1IqqgOkUP2rP6JTh2f
 IoIXMYBITdSfETW99GO4Yd7RDQ2KXvPkfHlDUTvgWV+8NJPrttSNgP4lCeNR9Me+
 wM/OhWNQGssKvEs2/Myr3Nq9QutCfGxJYdODu3hOHBfvASwpZCiRAFB2RJefshJq
 1S9ML8cDkQYNRys7LN2Ynby0Hpa8MdXLn6/JEA/C+jrBjxEL8KE+pFCHeptXWzZY
 Yj+9DEdRTAt9rhpojXjfGdssJwlOK/IYlrjLfNsplYKM0PNLzqdj/s9i/g==
 =w2VR
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmG3VRQACgkQmmx57+YA
 GNl/vw/9GZ+hk1r0szJvEAdI2gTqlMf6ZkrEoxI0VGei8Wky6wg2Dni1nrTiddKU
 pd+9PtD3DZALuypIvrWeu2VfJfLLF5ifUNyUpTFcOpj8BVXIteGuoDzNMhIrpNO7
 a4MzsZZTp5o782IkRjyZv/oxr4ANleCZsICeGfpyhCwvRi6ZGig+5Bf6LEvVZRyW
 8cjcW1n6Pi9EjiPdLqgc1LFI3IHx/nZ1TX/3ioeoDzWv1vPS/1Q2U0deR4jfjFOt
 /Ji7IS6DvOAvsTzUyV97VndPTyauDP9/8poga1odmCiwagCyzb7BNiNT3oo91YxN
 6WHiMber30uVVsnqsqcwnegY/PG5Lmfl3GfchnVVlzTjviTnV2coyGhJU2kelPvz
 8XisIbTSRa/uxEK/+43/Zuqxb/2bBwJANPqDO8FGdhEaowhCFT4+aCAYZ83hRoBV
 1XWMYksO77Sp0cghFQB36XzEyBkhQnhcbVvW1bZ7PBjdS2rJ/u0HoyVM2XQghu+a
 XYts4Shclg3RWKWNklzmgJ0UeNwgIlLNq2kgEEUI6Be8HI6K8z5XmuiMa27knXuc
 ONGfvekOgJv/Gz828l+e4T1MhqC42M17uGdh1D/G/B2uDJZJO7qwj4zXKeQmg5i/
 SU0A7VyXJRTc4jb6S5iSEE9LPKgj2Nwgmbsh2ARmQbevT21ccZM=
 =B220
 -----END PGP SIGNATURE-----

Merge tag 'imx-fixes-5.16-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes

i.MX fixes for 5.16, round 2:

- One fix on imx8m-blk-ctrl driver to get i.MX8MM MIPI reset work
  properly
- Fix CSI_DATA07__ESAI_TX0 pad name in i.MX7ULL pin function header
- Remove interconnect property from i.MX8MQ LCDIF device to fix the
  regression that LCDIF driver stops probe, because interconnect
  provider driver (imx-bus) hasn't been fully working.
- Fix soc-imx driver to register SoC device only on i.MX platform.

* tag 'imx-fixes-5.16-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  soc: imx: Register SoC device only on i.MX boards
  soc: imx: imx8m-blk-ctrl: Fix imx8mm mipi reset
  ARM: dts: imx6ull-pinfunc: Fix CSI_DATA07__ESAI_TX0 pad name
  arm64: dts: imx8mq: remove interconnect property from lcdif

Link: https://lore.kernel.org/r/20211211015625.GK4216@dragon
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-13 15:13:40 +01:00
Arnd Bergmann
ddae25ed97 SoCFPGA fix for v5.16, part 2
- Fix QSPI dts entry to include "jedec,spi-nor"
 -----BEGIN PGP SIGNATURE-----
 
 iQJIBAABCgAyFiEEoHhMeiyk5VmwVMwNGZQEC4GjKPQFAmGqWjAUHGRpbmd1eWVu
 QGtlcm5lbC5vcmcACgkQGZQEC4GjKPRmXQ/+JIcLMbqMyVPapzYzHNwu4oXZka79
 zvd2FPFwOiP9YsrO7kYLMZtc7Rbb/A1hKVPjM6KId/1TKiYq+jZzOEuDzAuKKx+K
 htp7iZsUwBm6P9PjVPZOJddZXKEPzrl9ah3NiuLU1BA1FvWJgrmu99IOvBsBT4Yt
 bpUO2VrchkFi0qemjyYw/MLHW2Xs1MgmugFJF/k/3EBcN+BNwiJBMSzEmPyZSvJO
 WXRFPSRC7vtlEBHjo5bLDZR48HWgaYKg+njVhHTENr2gMQp+vh72DaBHymYpuLX6
 Wqwp28z/WUfqGLf2wJHkWVencifHsab1hrFuWk2r3MURD5Ez/PACVFVO/FExaYdK
 qVL6MPze3mxc0k/hVWfXou2Z2ACeScNANQn+VQA/UwC+/RZdyeIQ3K6TrgZmFSeO
 fLu4p1lR7oU8spVFgXXPRA8MIZs12DfHyAWh8LFSEro5BWl7Cs7z1bmQXmDidtIW
 mpy27M0p/NCp7C2Xnb0G2zYvk0uVkWp2QXckHeOwdBNnPnrOZIjCXM+y/+yxC0t9
 yV8DEzjCOx/d9i1Nax5ybZ/olbgznC2nFKWWBkos6RIWSNDze2XdIzbG1hkpO016
 KmLRpFlRxirNEkOnWB9RwWcHClwVPGEI8X0Mea2jLcNp020Ju0EHE8Sum8o/RSJg
 TzD80q0kaP2L0uQ=
 =+LeJ
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmG3UowACgkQmmx57+YA
 GNnmUg//UuswIgaJ8aBDobY6FQ0lzYm0egiGEQE2swuQ6ytMW0U8A+N7D8pu/bO0
 3QStUNxrdgHs4NFghpcdCwLshJaAj3IkXKAwqsbUvAxvv6dkitoAOil0g/TIU+xu
 q3Ik2o7FQ9dowQy9aPkrKpoeVCyPNz9y08jRSiYj3RUr3J8qjjC2KobcAniL745E
 XIxBwMvUDyhMDv/6kpsVZz0RGMoUm9fZi+w4yILL8uqn8vmWqF0z+A+I4eHtQO8b
 k9qC6e/z4JCnrgBQUPNwzg7yrLtyFub/2hM5WgFJZ8iPkbfIcCRPMEvDqhx70ZZI
 bMOkvgKfqoNB+6Ei9Xg+T4CsnPiSOZ/HYfCCa+ieLppAtMi+NCgh+4UllIllSaL9
 ZWCC7cSDB1inQ97usgpw++d6ZBLc/vyZHsFuOQlZsBKuX7HbzM7lhPH8WCQix0X4
 n9guZeYBBVWx59/Bp9qO7plLmMWIHCAIcsDMMjqYbNicD/cwWc9XU5+FFP+2xwfd
 5raNudIOu2+lCL5Y60wD750waspcrfNWwEaEw8zJ4RPUo5zY4bSjVg+IEqJPPIjD
 c6H4ULA3vRUIh7/ZLK5ooK1zEaYbRN38XsiKQO9xZXtuypKsY+3JNB3c5lI3Iijz
 Hpki4AaothgKRmpfBSWe7/2Kw07F5BLb6I/SITO0J5qMObNotV0=
 =Hbbn
 -----END PGP SIGNATURE-----

Merge tag 'socfpga_fix_for_v5.16_part_2' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into arm/fixes

SoCFPGA fix for v5.16, part 2
- Fix QSPI dts entry to include "jedec,spi-nor"

* tag 'socfpga_fix_for_v5.16_part_2' of git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
  ARM: socfpga: dts: fix qspi node compatible

Link: https://lore.kernel.org/r/20211203181007.3138381-1-dinguyen@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-13 15:02:52 +01:00
Arnd Bergmann
708038dc37 i.MX fixes for 5.16:
- A series from Vladimir Oltean to update SJA1105 switch RGMII delay for
   a few boards, so that kernel doesn't warn on the legacy bindings.
 - Remove redundant interrupt declaration for gpio-keys on board
   ls1088a-ten64, as this causes an IRQ reclaiming error on kernel v5.15
   and later.
 -----BEGIN PGP SIGNATURE-----
 
 iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAmGgsRAUHHNoYXduZ3Vv
 QGtlcm5lbC5vcmcACgkQUFdYWoewfM7cvAgAqnWK9OcpXErsi/ACWOqJ64F4yT8k
 ePzcGPvzFeNbuk2bm8l/zz7WueoKzM5tvk9bocwyUveXDwIIBIC6CoDU0yiHHh9P
 x9hhoU9VaY0GhFKzBfCuMXb7i0r5QIMOH++TJ1muFP+wRgBkGdPhyL+ijvd1EhQK
 K0QB+izgdcI1TvCypC2eZMY5vsyOCmnqE3EpQVzJSDfzJeFa48jFZ2eybGd6l9AQ
 /3W4nWQwS/930TbMSM1hh24v8gGxwei+GWbwPREKT2Fu/Rj9jctX2s01/nsMu73Q
 0bpf7nXx+uxS3CaN8vWIKEDRHsOeHPIIJ7wwBShIwh3XQtLb6lmS546rXA==
 =8XSh
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmG3T/wACgkQmmx57+YA
 GNkIGRAAm0DCZO+PQoErzjvon+Wb5E5XcrkRe/X0Y+X6NTbgPHm5NbOQDyDeduOH
 H6+89jYytzD4j8SogbwlZCyt14dZ5X83v1kpjpgl7ibBiR+/7aLJKfXkqb9yMBWd
 ndViTflQSexJzJSPLA47XLg/BCc7rZzz3HB20cdBfASqKN+nvz8012LebLWmO+6U
 Jbz+x3T2bXqmnCy52Na48OelwxNxy0hUMOdHUEB5GG4rLbgDaf9JFXzQGggzVRsA
 QROP7MqrGMrLxcwqvzEDPccZv387VJc33YCPDy4kfSeHb/KkrrLTccLeXRmKAx0p
 tXYxa5vU4PIMNb86AoNZ9H+jWYF7xMmMmz4zvtjSKyNydT7ZMY3XgKgWztSwy37a
 cKguckLQnz1jmxpxZOxu+N+fwkR/0ZE7sL10ia5t02vjGZfeJSY1V/8v/7K6UnQo
 0nVAQzcBBGqaw64Z/QMxYCepRY0Eb4/6ZX2FaqdZeEhgKu0LiADXMr3QaizeL0q6
 Qscg031L9eQ1uSnp6YCP1lYiafH2n84d7XrjB2jL2TZ186WKy+OqgeG9ZJKDebuK
 9OveVjbUUNZ1RlHHWnBBbbz3C0dgGuDZ4IDmso2IET9i0LtL57MVKefYRdHoE9ZH
 livdCYlfujRPkWIM7PS/D07feMoFsW5VW/nSxCp7szvZCMlmDrI=
 =3mvY
 -----END PGP SIGNATURE-----

Merge tag 'imx-fixes-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes

i.MX fixes for 5.16:

- A series from Vladimir Oltean to update SJA1105 switch RGMII delay for
  a few boards, so that kernel doesn't warn on the legacy bindings.
- Remove redundant interrupt declaration for gpio-keys on board
  ls1088a-ten64, as this causes an IRQ reclaiming error on kernel v5.15
  and later.

* tag 'imx-fixes-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  arm64: dts: ten64: remove redundant interrupt declaration for gpio-keys
  arm64: dts: lx2160abluebox3: update RGMII delays for sja1105 switch
  ARM: dts: ls1021a-tsn: update RGMII delays for sja1105 switch
  ARM: dts: imx6qp-prtwd3: update RGMII delays for sja1105 switch

Link: https://lore.kernel.org/r/20211126100716.GF4216@dragon
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-12-13 14:51:55 +01:00
Tudor Ambarus
078c2a0e8e ARM: dts: at91: sama7g5ek: Add QSPI0 node
QSPI0 comunicates with a MX66LM1G45G SPI NOR flash.
Enable the controller and describe the flash.

Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20211209123643.341892-2-tudor.ambarus@microchip.com
2021-12-13 14:48:04 +01:00
Tudor Ambarus
0081a525ce ARM: dts: at91: sama7g5: Add QSPI nodes
sama7g5 embedds 2 instances of QSPI controller:
1/ OSPI0 Supporting Up to 200 MHz DDR. Octal, TwinQuad, Hyperflash
   and OctaFlash Protocols Supported.
2/ QSPI1 Supporting Up to 90 MHz DDR/133 MHz SDR.

Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20211209123643.341892-1-tudor.ambarus@microchip.com
2021-12-13 14:48:04 +01:00
Tudor Ambarus
cf4060f1bb ARM: dts: at91: sama5d2: Name the qspi clock
Naming clocks is a good practice. The atmel-quadspi driver supports
an unnamed clock for the peripheral clock in order to be backward
compatible with old DTs, but it is recommended to name the clocks
on new DTs. The driver's bindings file requires the clock-names
property, so name the clock.

Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20211209102542.254153-1-tudor.ambarus@microchip.com
2021-12-13 14:46:42 +01:00
Alex Elder
c0d6316c23 ARM: dts: qcom: sdx55: fix IPA interconnect definitions
The first two interconnects defined for IPA on the SDX55 SoC are
really two parts of what should be represented as a single path
between IPA and system memory.

Fix this by combining the "memory-a" and "memory-b" interconnects
into a single "memory" interconnect.

Reported-by: David Heidelberg <david@ixit.cz>
Tested-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Alex Elder <elder@linaro.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
2021-12-13 12:49:26 +00:00
Uwe Kleine-König
5e8c1bf1a0 ARM: dts: bcm2711-rpi-4-b: Add gpio offsets to line name array
this helps human readers considerably to determine the line name for a
given offset or vice versa.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
[ nsaenz: corrected patch title ]
Signed-off-by: Nicolas Saenz Julienne <nsaenz@kernel.org>
Link: https://lore.kernel.org/r/20211130161147.317653-1-u.kleine-koenig@pengutronix.de
2021-12-13 13:08:04 +01:00