Arnd Bergmann
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0a7c2fda34
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clk: sophgo: avoid open-coded 64-bit division
On 32-bit architectures, the 64-bit division leads to a link failure:
arm-linux-gnueabi-ld: drivers/clk/sophgo/clk-cv18xx-pll.o: in function `fpll_calc_rate':
clk-cv18xx-pll.c:(.text.fpll_calc_rate+0x26): undefined reference to `__aeabi_uldivmod'
This one is not called in a fast path, and there is already another div_u64()
variant used in the same function, so convert it to div64_u64_rem().
Fixes: 80fd61ec46 ("clk: sophgo: Add clock support for CV1800 SoC")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lore.kernel.org/r/20240415134532.3467817-1-arnd@kernel.org
Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202404122344.d5pb2N1I-lkp@intel.com/
Closes: https://lore.kernel.org/oe-kbuild-all/202404140310.QEjZKtTN-lkp@intel.com/
Reviewed-by: Inochi Amaoto <inochiama@outlook.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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2024-04-19 14:38:01 -07:00 |
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Inochi Amaoto
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a12069a39b
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clk: sophgo: Make synthesizer struct static
Let all synthesizer structs are static to make the compiler happy.
Fixes: 80fd61ec46 ("clk: sophgo: Add clock support for CV1800 SoC")
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Link: https://lore.kernel.org/r/IA1PR20MB49531E437735A71A163694AEBB052@IA1PR20MB4953.namprd20.prod.outlook.com
Reported-by: kernel test robot <lkp@intel.com>
Closes: https://lore.kernel.org/oe-kbuild-all/202404120548.y9dZIi0e-lkp@intel.com/
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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2024-04-11 22:51:24 -07:00 |
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Inochi Amaoto
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1cce3e61af
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clk: sophgo: Add clock support for SG2000 SoC
Add init code for SG2000 SoC.
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Link: https://github.com/sophgo/sophgo-doc/releases/tag/sg2000-datasheet-v1.0-alpha
Link: https://lore.kernel.org/r/IA1PR20MB49537156E71B64483F15C0F2BB262@IA1PR20MB4953.namprd20.prod.outlook.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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2024-04-11 00:02:20 -07:00 |
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Inochi Amaoto
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3b8d204212
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clk: sophgo: Add clock support for CV1810 SoC
Add clock definition and init code for CV1810 SoC.
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Link: 6f4e9b8ecb/duo/datasheet/CV180X-Clock-v1.xlsx
Link: https://lore.kernel.org/r/IA1PR20MB495357FB5EEA1623DAB08C94BB262@IA1PR20MB4953.namprd20.prod.outlook.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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2024-04-11 00:02:20 -07:00 |
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Inochi Amaoto
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80fd61ec46
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clk: sophgo: Add clock support for CV1800 SoC
Add clock definition and driver code for CV1800 SoC.
Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Link: 6f4e9b8ecb/duo/datasheet/CV180X-Clock-v1.xlsx
Link: 6f4e9b8ecb/duo/datasheet/CV1800B-CV1801B-Preliminary-Datasheet-full-en.pdf
Link: https://lore.kernel.org/r/IA1PR20MB49534F37F802CAF117364D66BB262@IA1PR20MB4953.namprd20.prod.outlook.com
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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2024-04-11 00:02:20 -07:00 |
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