This removes duplicate includes in the sc7180-trogdor files, which
accidentally ended up disabling nodes intended to be enabled.
It corrects identifiers for CPU6/7 on MSM8994. On SM8450 the UFS node's
interconnects property is updated to match the #interconnect-cells,
avoiding sync_state issues and the GIC ITS is defined, to correct the
references from the PCIe nodes. On SDM845 the display subsystem's AHB
clock is corrected and on msm8992 devices, the supplies for lvs 1 and 2
are correctly specified.
Lastly, a welcome addition of Konrad as reviewer for the Qualcomm SoC.
-----BEGIN PGP SIGNATURE-----
iQJPBAABCAA5FiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmLBBmobHGJqb3JuLmFu
ZGVyc3NvbkBsaW5hcm8ub3JnAAoJEAsfOT8Nma3FuvsQAKP6BXA5FQ13nHdfFh38
kgNdw93SIn49MW7jxHbnYRXxxW0j1SxxipQAZmlfChE3qptfjzaQcdtN/AboNLi8
sBT03vjoMPysoe9aLOEY3BLCsM/qB3AiP5jXEahu8P3RbU6cY69W8mUEoZhzBi3H
Cow0g0zg37R48W7DZkh+B0rDzFk48TGzbnrBCwrJ4PF3cciNVKZOWmBMA3Vm0741
vckIU1WCff3v56ZyAusv4wmDBq5Y0K5/PCx4xz3qoFXBXoH27I0XxywXgbb2tmtH
MqxeOjS+hwJePW3dqMs2h09z0Uf5NT2cgoobCMkNOl3j/0Dwrn0zINRxBVNCLVDq
h084fcFxKqQWWbN+SDO5QUIyPgAs/XVyG8nzEXE19XftOIu9NGfTBOYZZ2kWGZCM
IJIFfvxm6Xh73dd0afDRRMbxZrpLaBrq0vz4jF3A3Ycs7r5JEgsz18H1yo/YzGX0
sXlTdTBUEaHZnfhQNfsNdVXaFcXWu0gLmH/sh7nRd++9Gl4d0r0Ro9Q/ZYfThsRI
vWQWuhLq15JL2c/qGxK/BTHIdN/+d4v3pr5CirM+ijKUZjzyAsB6e6i6gf4WNEUi
EdDf3Sj7IWOIAx4/80Xg+r+4MfCW5ZWKGSxIlpYFX83bSh2uM2Zopjiwg1qxw70k
RgtLmTxsC22YnwWcks49OjWV
=sObb
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmLB/d8ACgkQmmx57+YA
GNniWw/+NMqJ3hrizjmDS3sk2feWr6fU96gGYZ8myD/Qkw/5Kx3tOztf6mvU2SHm
SGWyhIT72SalATxyH0EDzrx8UG/wcdXXN/3xwTnLS5BtwgqdjcltV33zD3WvcQVu
Waswso1ULQH9NyWib+1aB5fFGJNUMtqWvGLBUJO2gQNphojTpICdHJKbe8B/VzXY
z5n/3yOiaoOdpjy2p65Fi6LTlEmeZY5NtiZL5aIw83728eJILcLmX0vjtuGvG3df
qp8HmFDhTYimQVqQC9bhG84lQSyGsos8/4ntxiYZddgL1ukmRRFb8ZAk9Vbvqkb8
8RK8v7J75uKFF0SIQ8j0OOHN/J7SrrTCuvUlE+pjL+HpTFMwJm+wlPAvPUZl3Szg
nMIExwZHklnzkW+mqTeQGm/RFzErAXPARuu4pmgy+6J01Az29qNq5S7TiszxKbSm
cTPaPZCNLvAAHsZ4VudG6wzT56QB8NEv6ktvKELQ+e74x9AYe+unn3Url1vCTir6
QjT/A3EoPf8bMQJAJNXMDOThVU7RNBEvi1kli8H6vGqvnTCedRCovso/ntAyvyF3
dTV1CHIjVo9f/LN8TrxBIj2mUl4u0dGT5JCtQXWqJNKprkrXLOdH7I5DsVwAcJkY
pWWpf8Nr1yMWSBa2gRs5zhR9dq0xJK8HX3+E5OfbN5Wum7AKrkw=
=+pwl
-----END PGP SIGNATURE-----
Merge tag 'qcom-arm64-fixes-for-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/fixes
Qualcomm ARM64 DT fixes for v5.19
This removes duplicate includes in the sc7180-trogdor files, which
accidentally ended up disabling nodes intended to be enabled.
It corrects identifiers for CPU6/7 on MSM8994. On SM8450 the UFS node's
interconnects property is updated to match the #interconnect-cells,
avoiding sync_state issues and the GIC ITS is defined, to correct the
references from the PCIe nodes. On SDM845 the display subsystem's AHB
clock is corrected and on msm8992 devices, the supplies for lvs 1 and 2
are correctly specified.
Lastly, a welcome addition of Konrad as reviewer for the Qualcomm SoC.
* tag 'qcom-arm64-fixes-for-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
arm64: dts: qcom: msm8992-*: Fix vdd_lvs1_2-supply typo
MAINTAINERS: Add myself as a reviewer for Qualcomm ARM/64 support
arm64: dts: qcom: sdm845: use dispcc AHB clock for mdss node
arm64: dts: qcom: sm8450 add ITS device tree node
arm64: dts: qcom: msm8994: Fix CPU6/7 reg values
arm64: dts: qcom: sm8450: fix interconnects property of UFS node
arm64: dts: qcom: Remove duplicate sc7180-trogdor include on lazor/homestar
Link: https://lore.kernel.org/r/20220703030208.408109-1-bjorn.andersson@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Fix the SDIO description for imx7d-smegw01 board to ensure there is
no communication made at 1.8V.
- Fix pgc_ispdwp power-domain clock, which should be
IMX8MP_CLK_MEDIA_ISP_ROOT.
- Re-enable framebuffer support in mxs_defconfig to fix a Kconfig
regression.
- A series from Peng Fan (and Sherry Sun) fixing various pads on i.MX8MP
based boards to leave reserved bits untouched.
-----BEGIN PGP SIGNATURE-----
iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAmK7tGoUHHNoYXduZ3Vv
QGtlcm5lbC5vcmcACgkQUFdYWoewfM6gQQgAsaOPV6XCcWJCf+BAJkZvk8ba4Q4C
F/fZHnqbXFUeQqjMckVv1b9UlGLw2uNeWoW0FfQ/p8WV+uDLIlpp19wpvJHKkTM1
U1zIBK0RdJiUrngfCrOedZwHmzg11D3aVn0gotEPbW+S+aXXcW5GXH0Tt2Z/v5mF
hKIxqW1KE+OUpCAoNIehgImFjKjS8fFX4vxMQ81bkdp9iLTNc6kvsHivyXk1wS2F
E5CmaWPlPGHjaKXWvUnh8rO2QstRNTZpYe1FbCheRGBcfT2U6VFPAMYc9EJNM64d
UKSHOsT4l+7D7Jk8CMMYftBII21fwX+Qs3PepE/rnND3WYygH09iFOHNDA==
=6inj
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmK+82oACgkQmmx57+YA
GNl0iQ/6AwGvoVBgs6k+eO7S9NCXif7uIYpMMeo+Qjz0+Za/4xbv9j8MOXETOOZi
2Rm0bmlEwUHO05Hm35oel2t1AGFm13cWcyvGUyVSl5vuv2z0W/CHwGD9qu3vxaEV
ui7Oya0pdAKIVlYbK+2LVPKCUbb2lpnxgQfhlrzNLj9sH14EEFlX8iAD1HAgyN9w
hql8BGtWwESPYM/55hmWIywxrQo+AHKKtgsL8Ba8pOKcc7sO7UC6I/qigQ3g31Ce
pCDhtHM2dWVdqivRWwvbfu8lswJjB8SFGrTKGDsmpqy/OSJGGcrETJ/6F+RUBpI7
ADv2tIgPw8LWWWLyCi3KNdRiySdwiBs8cJQiVzpJghfRg2izMn7DyHW0KAkzaUW7
zUYgvdOe6Rc3DpSSdY6MO2pgxha1xKFoun0xlm16Qt4yi7iNaiFH5lGKs6hOyOoG
0vTZyESIgYT1V2xXIqaH6MPhZR8jTYY0RHM7p7uhKjbSmT/VVBkaC49bYd+io5Ym
dkKdGMAff6NlAzwChXuM2j7t2PnTyt/9FocsBZKTcD5iFyVkg1YDZcAKK70iFwxi
IFXPTN5099jX8vkFjHUdrpI5jshHld+zC6/PHOEztYznWLxqJA5p64/4hrB+teCz
WDEVCtRSQCFqMaOiYcC/oUNN5koKoGGivT6xipYOo35QTRyzm+k=
=ZOsU
-----END PGP SIGNATURE-----
Merge tag 'imx-fixes-5.19-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes
i.MX fixes for 5.19, round 2:
- Fix the SDIO description for imx7d-smegw01 board to ensure there is
no communication made at 1.8V.
- Fix pgc_ispdwp power-domain clock, which should be
IMX8MP_CLK_MEDIA_ISP_ROOT.
- Re-enable framebuffer support in mxs_defconfig to fix a Kconfig
regression.
- A series from Peng Fan (and Sherry Sun) fixing various pads on i.MX8MP
based boards to leave reserved bits untouched.
* tag 'imx-fixes-5.19-2' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
arm64: dts: imx8mp-icore-mx8mp-edim2.2: correct pad settings
arm64: dts: imx8mp-phyboard-pollux-rdk: correct i2c2 & mmc settings
arm64: dts: imx8mp-phyboard-pollux-rdk: correct eqos pad settings
arm64: dts: imx8mp-phyboard-pollux-rdk: correct uart pad settings
arm64: dts: imx8mp-venice-gw74xx: correct pad settings
arm64: dts: imx8mp-evk: correct I2C3 pad settings
arm64: dts: imx8mp-evk: correct I2C1 pad settings
arm64: dts: imx8mp-evk: correct I2C5 pad settings
arm64: dts: imx8mp-evk: correct vbus pad settings
arm64: dts: imx8mp-evk: correct eqos pad settings
arm64: dts: imx8mp-evk: correct vbus pad settings
arm64: dts: imx8mp-evk: correct gpio-led pad settings
arm64: dts: imx8mp-evk: correct the uart2 pinctl value
arm64: dts: imx8mp-evk: correct mmc pad settings
ARM: mxs_defconfig: Enable the framebuffer
arm64: dts: imx8mp: correct clock of pgc_ispdwp
ARM: dts: imx7d-smegw01: Fix the SDIO description
Link: https://lore.kernel.org/r/20220629021244.GL819983@dragon
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
"make dtbs_check" complains about the missing "-supply" suffix for
vdd_lvs1_2 which is clearly a typo, originally introduced in the
msm8994-smd-rpm.dtsi file and apparently later copied to
msm8992-xiaomi-libra.dts:
msm8992-lg-bullhead-rev-10/101.dtb: pm8994-regulators: 'vdd_lvs1_2'
does not match any of the regexes:
'.*-supply$', '^((s|l|lvs|5vs)[0-9]*)|(boost-bypass)|(bob)$', 'pinctrl-[0-9]+'
From schema: regulator/qcom,smd-rpm-regulator.yaml
msm8992-xiaomi-libra.dtb: pm8994-regulators: 'vdd_lvs1_2'
does not match any of the regexes:
'.*-supply$', '^((s|l|lvs|5vs)[0-9]*)|(boost-bypass)|(bob)$', 'pinctrl-[0-9]+'
From schema: regulator/qcom,smd-rpm-regulator.yaml
Reported-by: Rob Herring <robh@kernel.org>
Cc: Konrad Dybcio <konrad.dybcio@somainline.org>
Fixes: f3b2c99e73 ("arm64: dts: Enable onboard SDHCI on msm8992")
Fixes: 0f5cdb31e8 ("arm64: dts: qcom: Add Xiaomi Libra (Mi 4C) device tree")
Signed-off-by: Stephan Gerhold <stephan.gerhold@kernkonzept.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220627135938.2901871-1-stephan.gerhold@kernkonzept.com
BIT3 and BIT0 are reserved bits, should not touch.
Fixes: 88f7f6bcca ("arm64: dts: freescale: Add support for phyBOARD-Pollux-i.MX8MP")
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
BIT3 and BIT0 are reserved bits, should not touch.
Fixes: 6f96852619 ("arm64: dts: freescale: Add support EQOS MAC on phyBOARD-Pollux-i.MX8MP")
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
According to RM bit layout, BIT3 and BIT0 are reserved.
8 7 6 5 4 3 2 1 0
PE HYS PUE ODE FSEL X DSE X
Should not set reserved bit.
Fixes: 7899eb6cb1 ("arm64: dts: imx: Add i.MX8M Plus Gateworks gw7400 dts support")
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
According to RM bit layout, BIT3 and BIT0 are reserved.
8 7 6 5 4 3 2 1 0
PE HYS PUE ODE FSEL X DSE X
Although function is not broken, we should not set reserved bit.
Fixes: 5e4a67ff7f ("arm64: dts: imx8mp-evk: Add i2c3 support")
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
According to RM bit layout, BIT3 and BIT0 are reserved.
8 7 6 5 4 3 2 1 0
PE HYS PUE ODE FSEL X DSE X
Although function is not broken, we should not set reserved bit.
Fixes: 5497bc2a2b ("arm64: dts: imx8mp-evk: Add PMIC device")
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
According to RM bit layout, BIT3 and BIT0 are reserved.
8 7 6 5 4 3 2 1 0
PE HYS PUE ODE FSEL X DSE X
Although function is not broken, we should not set reserved bit.
Fixes: 8134822db0 ("arm64: dts: imx8mp-evk: add support for I2C5")
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
According to RM bit layout, BIT3 and BIT0 are reserved.
8 7 6 5 4 3 2 1 0
PE HYS PUE ODE FSEL X DSE X
Not set reserved bit.
Fixes: 9e847693c6 ("arm64: dts: freescale: Add i.MX8MP EVK board support")
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
According to RM bit layout, BIT3 and BIT0 are reserved.
8 7 6 5 4 3 2 1 0
PE HYS PUE ODE FSEL X DSE X
Although function is not broken, we should not set reserved bit.
Fixes: dc6d5dc89b ("arm64: dts: imx8mp-evk: enable EQOS ethernet")
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
0x19 is not a valid setting. According to RM bit layout, BIT3 and BIT0
are reserved.
8 7 6 5 4 3 2 1 0
PE HYS PUE ODE FSEL X DSE X
Not set reserved bit.
Fixes: 43da4f92a6 ("arm64: dts: imx8mp-evk: enable usb1 as host mode")
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
0x19 is not a valid setting. According to RM bit layout,
BIT3 and BIT0 are reserved.
8 7 6 5 4 3 2 1 0
PE HYS PUE ODE FSEL X DSE X
Correct setting with PE PUE set, DSE set to 0.
Fixes: 50d336b12f ("arm64: dts: imx8mp-evk: Add GPIO LED support")
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
According to the IOMUXC_SW_PAD_CTL_PAD_UART2_RXD/TXD register define in
imx8mp RM, bit0 and bit3 are reserved, and the uart2 rx/tx pin should
enable the pull up, so need to set bit8 to 1. The original pinctl value
0x49 is incorrect and needs to be changed to 0x140, same as uart1 and
uart3.
Fixes: 9e847693c6 ("arm64: dts: freescale: Add i.MX8MP EVK board support")
Reviewed-by: Haibo Chen <haibo.chen@nxp.com>
Signed-off-by: Sherry Sun <sherry.sun@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
According to RM bit layout, BIT3 and BIT0 are reserved.
8 7 6 5 4 3 2 1 0
PE HYS PUE ODE FSEL X DSE X
Not set reserved bit.
Fixes: 9e847693c6 ("arm64: dts: freescale: Add i.MX8MP EVK board support")
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The deprecated DIV clk is previously part of the ISP composite clk, but
there is still one child clk(IMX8MP_CLK_MEDIA_ISP_ROOT) sourcing from
IMX8MP_CLK_MEDIA_ISP( previously IMX8MP_CLK_MEDIA_ISP_DIV)
So IMX8MP_CLK_MEDIA_ISP_ROOT should be used, not IMX8MP_CLK_MEDIA_ISP_DIV.
Fixes: 9d89189d52 ("arm64: dts: imx8mp: Add MEDIAMIX power domains")
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Tested-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
It was noticed that on sdm845 after an MDSS suspend/resume cycle the
driver can not read HW_REV registers properly (they will return 0
instead). Chaning the "iface" clock from <&gcc GCC_DISP_AHB_CLK> to
<&dispcc DISP_CC_MDSS_AHB_CLK> fixes the issue.
Fixes: 08c2a076d1 ("arm64: dts: qcom: sdm845: Add dpu to sdm845 dts file")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220531124735.1165582-1-dmitry.baryshkov@linaro.org
Add device tree node corresponding to the ITS part of GICv3.
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220502192604.272686-1-dmitry.baryshkov@linaro.org
All interconnect device tree nodes on sm8450 are 2-cells, however in
UFS node they are handled as 1-cells, fix it.
Fixes: aa2d0bf04a ("arm64: dts: qcom: sm8450: add interconnect nodes")
Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220310221934.1560729-1-vladimir.zapolskiy@linaro.org
Both fixes are for issues present before v5.19 merge window:
1. Correct UART clocks on Exynos7885. Although the initial, fixed
DTS commit is from v5.18, the issue will be exposed with a upcoming fix
to Exynos7885 clock driver, so we need to correct the DTS earlier.
2. Fix theoretical OF node leak in Exynos machine code.
-----BEGIN PGP SIGNATURE-----
iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmK1b10QHGtyemtAa2Vy
bmVsLm9yZwAKCRDBN2bmhouD10UYD/4ycN/GFy89kBKOURfTvdCdu/UMgS52GR1/
q7xM+4ozv/18DRkh/b8OsxVNGekrKmHMFtKrdszLY4ITeNrVqt+vQe3ZIOT0SxDS
xyBenMUSzoNjYAPGTf1MofBovUM+4FEIK7kzhRiXqcplTS3kqkF5UKwNMmL4JQWJ
JGvtOkByzhjH8jjUopEaw44gfbbmXKWm/4Ukst2B4vUb9Bk2hhboT+L0MUWImBO1
31xOUOlzAEtjpwrcBGJ96AHQTzCcYuHWcwtJfBrB/3bbdAwvnjqqrCwO7Heoe8qM
lkOLQfXxZzKLYY6rsa8Zz/2Rgh0+0esMBXD/nBsbv0vf/MTQixIO49HfUBhvZnWJ
MNN1OlYpt9+tEiWZ/Xq2Od6ks5cByZGfOuRYkjXO0HjNYFE7RFmrXaLvsELLhx9Y
GbdzbFvZVHYsmBOszTL+DQPGh3pgH0PN+kU0pbtx97LLwTqytllTFErzorZ9jppM
nJP9xkiv3+244DIsWZQT0wth4U8BdzF0pTYiQSqF+Eitn4I3/QSuKqvR2X8cdQ7/
xIUlf9ZucIa/5X/RbR9WdX3pX5NzSAfebaUyGKgo5qUu3M0KIZBZIsXU6MT5LPvH
H/lLneDH5zQxVWL03MGzCpccROtNR7BG+yM+3ePCwOJ+iXRxDjyLYH2MnoJ4spXu
AkYG4biWsQ==
=gDkB
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmK11jgACgkQmmx57+YA
GNlcDhAArzMQck12DDz+ymkEoWlNPHyoy03MjkpkzGri0714jvDLK8a0CsitP00J
PhXdIf8zb4qlsoyPvJYsXYE0fY/UYZGK9Ttsb7fOSWlBpvD/l1c2hpxHvmMAa00F
NEymrR1NeuR1PIbooVKh5vy1H/jQR7cid/1aK497zS73oDoT3st7/M1Lm4PN2ain
9J5GZz256xWYE0ZTvxj6zEi+HzUyuokXdPe6MgUE9+66QWGMODMlyEUU6AhlHOf2
P3ib2xXYujteMVkTY+4FNEQN2B9wKjzZdPSpmxLinEotCiKfwzZSzkAxycWweFQV
yDw2c90YrkZ7TilA4QeFjcdyHPwWP4chBTmGpgnr6lhiv0NU5HebMlYKTkyzu1P5
dGHLQWqInIGlgzXBjgle16GMBoil81L2mDUEo0fOut+3M42tSU9IYGAGup5VKPpZ
wONQcQyyK3/tK+34wsk+BuwI+L7VPstUazIn4QeOup7ohQcrBWkKWvRd+yUrr/YF
6FQMvTs5I7gLEoj/uF9i3lmilLNnDfQDXFNCSWN8sT+TCh0LMyOc1N06k4A0Z2YI
taBCpRgiLDqiuYsmnnq3YfPR7rwE9lXc+qTeLUnmiBgPaHsqXY1qnSWZkEGOk8x8
vPtyldK6K64Fvw2ZCUdF+U2GTiuJOOGl86knjf5Ux7V4RnsfioM=
=h/OV
-----END PGP SIGNATURE-----
Merge tag 'samsung-fixes-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/fixes
Samsung fixes for v5.19
Both fixes are for issues present before v5.19 merge window:
1. Correct UART clocks on Exynos7885. Although the initial, fixed
DTS commit is from v5.18, the issue will be exposed with a upcoming fix
to Exynos7885 clock driver, so we need to correct the DTS earlier.
2. Fix theoretical OF node leak in Exynos machine code.
* tag 'samsung-fixes-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
ARM: exynos: Fix refcount leak in exynos_map_pmu
arm64: dts: exynos: Correct UART clocks on Exynos7885
Link: https://lore.kernel.org/r/20220624080423.31427-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The sc7180-trogdor-{lazor,homestar}-*.dtsi files all include
sc7180-trogdor.dtsi and sc7180-trogdor-lazor.dtsi or
sc7180-trogdor-homestar.dtsi, so including it here in the
sc7180-trogdor-{lazor,homestar}.dtsi file means we have a duplicate
include after commit 19794489fa ("arm64: dts: qcom: Only include
sc7180.dtsi in sc7180-trogdor.dtsi"). We include the sc7180-trogdor.dtsi
file in a board like sc7180-trogdor-lazor-r1.dts so that we can include
the display bridge snippet (e.g. sc7180-trogdor-ti-sn65dsi86.dtsi)
instead of making ever increasing variants like
sc7180-trogdor-lazor-ti-sn65dsi86.dtsi.
Unfortunately, having the double include like this means the display
bridge's i2c bus is left disabled instead of enabled by the bridge
snippet. Any boards that use the i2c bus for the display bridge will
have the bus disabled when we include sc7180-trogdor.dtsi the second
time, which picks up the i2c status="disabled" line from sc7180.dtsi.
This leads to the display not turning on and black screens at boot on
lazor and homestar devices.
Fix this by dropping the include and making a note that the
sc7180-trogdor-{lazor,homestar}.dtsi file must be included after
sc7180-trogdor.dtsi
Reported-by: Douglas Anderson <dianders@chromium.org>
Cc: "Joseph S. Barrera III" <joebar@chromium.org>
Cc: Matthias Kaehlcke <mka@chromium.org>
Fixes: 19794489fa ("arm64: dts: qcom: Only include sc7180.dtsi in sc7180-trogdor.dtsi")
Signed-off-by: Stephen Boyd <swboyd@chromium.org>
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Tested-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20220602190621.1646679-1-swboyd@chromium.org
GICD region was overlapping with GICR causing the latter to not map
successfully, and in turn the gic-v3 driver would fail to initialize.
This issue was hidden till commit 2b2cd74a06 ("irqchip/gic-v3: Claim
iomem resources") replaced of_iomap() calls with of_io_request_and_map()
that internally called request_mem_region().
Respective console output before this patchset:
[ 0.000000] GICv3: /bus@100000/interrupt-controller@1800000: couldn't map region 0
Fixes: b8545f9d3a ("arm64: dts: ti: Add initial support for J721S2 SoC")
Cc: linux-stable@vger.kernel.org
Cc: Marc Zyngier <maz@kernel.org>
Cc: Robin Murphy <robin.murphy@arm.com>
Cc: Nishanth Menon <nm@ti.com>
Signed-off-by: Matt Ranostay <mranostay@ti.com>
Acked-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Nishanth Menon <nm@ti.com>
Link: https://lore.kernel.org/r/20220617151304.446607-1-mranostay@ti.com
Pass unit name to soc node to fix the following W=1 build warning:
arch/arm64/boot/dts/freescale/s32g2.dtsi:82.6-123.4: Warning (unit_address_vs_reg): /soc: node has a reg or ranges property, but no unit name
Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Chester Lin <clin@suse.com>
Signed-off-by: Chester Lin <clin@suse.com>
Link: https://lore.kernel.org/r/20220514143505.1554813-1-festevam@gmail.com
The clocks in the serial UART nodes were swapped by mistake on
Exynos7885. This only worked correctly because of a mistake in the clock
driver which has been fixed. With the fixed clock driver in place, the
baudrate of the UARTs get miscalculated. Fix this by correcting the
clocks in the dtsi.
Fixes: 0687401532 ("arm64: dts: exynos: Add initial device tree support for Exynos7885 SoC")
Signed-off-by: David Virag <virag.david003@gmail.com>
Link: https://lore.kernel.org/r/20220526055840.45209-3-virag.david003@gmail.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Here is the "big" set of USB and Thunderbolt driver changes for
5.18-rc1. For the most part it's been a quiet development cycle for the
USB core, but there are the usual "hot spots" of development activity.
Included in here are:
- Thunderbolt driver updates:
- fixes for devices without displayport adapters
- lane bonding support and improvements
- other minor changes based on device testing
- dwc3 gadget driver changes. It seems this driver will never
be finished given that the IP core is showing up in zillions
of new devices and each implementation decides to do something
different with it...
- uvc gadget driver updates as more devices start to use and
rely on this hardware as well
- usb_maxpacket() api changes to remove an unneeded and unused
parameter.
- usb-serial driver device id updates and small cleanups
- typec cleanups and fixes based on device testing
- device tree updates for usb properties
- lots of other small fixes and driver updates.
All of these have been in linux-next for weeks with no reported
problems.
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-----BEGIN PGP SIGNATURE-----
iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCYpnZGw8cZ3JlZ0Brcm9h
aC5jb20ACgkQMUfUDdst+ymQhwCeLVANsQjBcL4ys4skl+1In17y28gAn3rEZ7rQ
Yv4uP9zadUqg3Cx0vjgf
=3s5s
-----END PGP SIGNATURE-----
Merge tag 'usb-5.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb
Pull USB / Thunderbolt updates from Greg KH:
"Here is the "big" set of USB and Thunderbolt driver changes for
5.18-rc1. For the most part it's been a quiet development cycle for
the USB core, but there are the usual "hot spots" of development
activity.
Included in here are:
- Thunderbolt driver updates:
- fixes for devices without displayport adapters
- lane bonding support and improvements
- other minor changes based on device testing
- dwc3 gadget driver changes.
It seems this driver will never be finished given that the IP core
is showing up in zillions of new devices and each implementation
decides to do something different with it...
- uvc gadget driver updates as more devices start to use and rely on
this hardware as well
- usb_maxpacket() api changes to remove an unneeded and unused
parameter.
- usb-serial driver device id updates and small cleanups
- typec cleanups and fixes based on device testing
- device tree updates for usb properties
- lots of other small fixes and driver updates.
All of these have been in linux-next for weeks with no reported
problems"
* tag 'usb-5.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (154 commits)
USB: new quirk for Dell Gen 2 devices
usb: dwc3: core: Add error log when core soft reset failed
usb: dwc3: gadget: Move null pinter check to proper place
usb: hub: Simplify error and success path in port_over_current_notify
usb: cdns3: allocate TX FIFO size according to composite EP number
usb: dwc3: Fix ep0 handling when getting reset while doing control transfer
usb: Probe EHCI, OHCI controllers asynchronously
usb: isp1760: Fix out-of-bounds array access
xhci: Don't defer primary roothub registration if there is only one roothub
USB: serial: option: add Quectel BG95 modem
USB: serial: pl2303: fix type detection for odd device
xhci: Allow host runtime PM as default for Intel Alder Lake N xHCI
xhci: Remove quirk for over 10 year old evaluation hardware
xhci: prevent U2 link power state if Intel tier policy prevented U1
xhci: use generic command timer for stop endpoint commands.
usb: host: xhci-plat: omit shared hcd if either root hub has no ports
usb: host: xhci-plat: prepare operation w/o shared hcd
usb: host: xhci-plat: create shared hcd after having added main hcd
xhci: prepare for operation w/o shared hcd
xhci: factor out parts of xhci_gen_setup()
...
and renaming of Quartz-A bluetooth pin nodename to not conflict with
Yaml constraints.
-----BEGIN PGP SIGNATURE-----
iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAmKRDwMQHGhlaWtvQHNu
dGVjaC5kZQAKCRDzpnnJnNEdgaxyB/9tzsQldon0EfO1UpZsbNaqT7b18E4tNUkY
4oNkm9GG5wgl9AcOzWnm40zb+2bpSgZUWqBiVgrtDJzvbDuS3fFIwzoyEV5QQysM
znQNyJzeBQ1rpNkd5qSOUaFwIblk7PGiuSD0JV/J9dkjsy4VSd4t6LkpR+1O1f4O
hcLhAtII6rzg/iNlLS0JCo2sNmF0kz7U4gLzNcq5AOZCHPkKQGBa0lR7DtAna41K
c8nKLlKBPY/Z60JAEtlcSEZVJS0Wk187FIwylfrUaeuVZKnCSrg3UyImFjEVT705
6ulPRjVdCWUWY+O71hyCiBEERQavDJwoCUD18hwLFtGwxtcQEgBz
=U6N1
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmKRMrUACgkQmmx57+YA
GNmBWA/9GvtI9XWiaaF+rZgxFurpsvLmQ/AwWKa61n99n4RGs7+9xihpX5nIF2k0
FXAIEUHL2rMYdgBWGUToSXa+9iia80cdw4Y/LPb2cQjOva3fBTxTzu904aCrZDjB
mx5ylqj9DRy77oya9yAFgaAO2Ze05/nUWuOI32sXgRoxzgUR/9zuDX16FVGVkvyE
OHUOEm24BZexd5qILIFQ/FlHF8m2DEgCG83APqtp0aNomfI+ahvkJkRxJqiIxkkq
rRVmKB3MsiOkBAAXEGetNUx0XeqN32oqsk9sbVrLnYhzJ+DvhBRg0txz2wDdmuZN
MZUERVbK19mvjjsXkJuKfapQ5mirbj1v0+sKTNWKhXl47avK/hPqoF8Q/OxsuBGf
B7W9AXjUENd4X4zwYbMvp8fDPOPDW6O4lj0QUJ2gV+lQp+tWiKOw95ltK5h0hWkQ
1PuOEYbroqB6t8PEWWayaTyWwRcAnN3h9outRwoXz32RIDxBG30xLgSFsuBlTBJ/
YDGD/oyyIJOmeSvlxgow/RrHRC91GbdxXitxCVq2+p1k/g6VTWRyBbgPlr4RTc12
BdAWNAp7dRf5AXWNXQt1YBx4jn1tkK4epNqlTOC+w0M29ocfO8Ntd8PPdDJLd6lq
Pg99jgoYw7kJ5/Iwh1rMWmOi6DQFcQNXcMtJPWk47FsB21RMq88=
=ZMYI
-----END PGP SIGNATURE-----
Merge tag 'v5.19-rockchip-dts64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/late
Clock properties for cru nodes to match the yaml-converted bindings
and renaming of Quartz-A bluetooth pin nodename to not conflict with
Yaml constraints.
* tag 'v5.19-rockchip-dts64-2' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
arm64: dts: rockchip: rename Quartz64-A bluetooth gpios
arm64: dts: rockchip: add clocks property to cru node rk3368
arm64: dts: rockchip: add clocks property to cru node rk3308
arm64: dts: rockchip: add clocks to rk356x cru
Link: https://lore.kernel.org/r/7695907.Sb9uPGUboI@phil
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The bluetooth binding for the Quartz64 Model A has incorrectly named
host-wakeup and device-wakeup gpios. Rename them to clear some dtbs_check
warnings.
Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Link: https://lore.kernel.org/r/20220511150117.113070-4-pgwipeout@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add clocks and clock-names because the device has to have
at least one input clock.
Also in case someone wants to add properties that start with
assign-xxx to fix warnings like:
'clocks' is a dependency of 'assigned-clocks'
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20220329180550.31043-2-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Add clocks and clock-names to the rk3308 cru node, because
the device has to have at least one input clock.
Also in case someone wants to add properties that start with
assign-xxx to fix warnings like:
'clocks' is a dependency of 'assigned-clocks'
With the addition of new properties also sort the node properties
a little bit.
Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20220329184339.1134-2-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The rk356x cru requires a 24m clock input to function. Add the clocks
properties to the cru to clear some dtbs_check warnings.
Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Link: https://lore.kernel.org/r/20220511150117.113070-3-pgwipeout@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
The '#dma-channels' property was deprecated in favor of one defined by
generic dma-common DT bindings. Add new property while keeping old one
for backwards compatibility.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Baolin Wang <baolin.wang7@gmail.com>
Link: https://lore.kernel.org/r/20220516142857.6419-4-krzysztof.kozlowski@linaro.org'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
There are 40 branches this time, adding a lot of new hardware
support, and cleanups. Krzysztof Kozlowski continues his treewide
cleanups.
There are a number of new SoCs, all of them as part of existing
families, and typically added along with a reference board:
- Renesas RZ/G2UL (R9A07G043) is the single-core version of the RZ/G2L
general-purpose MPU.
- Renesas RZ/V2M (R9A09G011) is a smart camera SoC
- Renesas R-Car V4H (R8A779G0) is an automotive chip with Cortex-A76
cores and deep learning accerlation.
- Broadcom BCM47622 is a new broadband SoC based on a quad Cortex-A7
and dual Wifi-6.
- Corstone1000 is a generic platform from Arm that is used for designing
custom SoCs, the support for now is for the Fixed Virtual Platform
emulation for it.
- Mediatek MT8195 (Kompanio 1200) is a high-end consumer chip used
in upcoming Chromebooks.
- NXP i.MXRT1050 is a Cortex-M7 based microcontroller, the first
MMU-less SoC to be added in a while
New machines based on already supported SoCs this time are mainly
for 32-bit platforms and include:
- Two wireless routers based on Broadcom bcm4708
- 30 new boards based on NXP i.MX6, i.MX7 and i.MX8 families, mostly
for the industrial embedded market, and on NXP LS1021A based
IOT board.
- Two ethernet switches based on Microchip LAN966
- Eight Qualcomm Snapdragon based machines, including a smartwatch,
a Chromebook board and some phones
- Another phone based on the old ST-Ericsson Ux500 platform
- Seven STM32MP1 based boards
- Four single-board computers based on Rockchip RK3566/RK3568
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmKOp8cACgkQmmx57+YA
GNk33hAAn/mY+QDyj8sUwtY4AAVtut2QgyBm7NBWLgiYDQx52yBwP7rUxeKyDqZF
q6LK5z3NA7NN5REpfn6WKBEFo6wkzTzg4Gev/h+9hwLyozch8vl4etBfZGak4A7m
cLCONZdw4FMCQ10oLq+ib/WJeJv2W700307OkJ3dN73qdbWLRF1hoyG+uMTHuEqL
If755IR+EYhxYz8CfJhCYb2BcqhRq047n3sEqolZpFtz5oHUW2dADASgWpV+3yNc
ql8cH0f5OTKbFS1lM4k7cWbMW2vHWx7jZnXZDyMfy3EE5SOb4V/s9JFJSS1pAfPQ
OWuq194LT+SIXTTT3DQ+lSNcMhlkyeXQ0JQE1wAAp0vov4V8vHGvEGk0MCku5QHp
zKKONPfcn9aoWtsh4GaCvt0cP0m7lKyjxJvNSjBy2C9dVW8t4UlIVZr+V8hR2Ufp
SpCCzMbttrcUK6rHzQmWsR563mhfszzuzDfZi4RK2aFLJKhFi5hEQF2tDxLq8Y09
vIY/OkRpSwahgbiyj/zhKrJtnhFHh1m6wZJG+Sk9lTJikEhaRinriy0lgu08xssG
krBHPOVhNY11rqlzosBU39JOya1/J2iTxjo7ccNmGfO4MDanE+Cl41a5wSNjciw1
ihi2zAUBClGg0TnQ+HJylFPS3ZFyGEtbYH/d6td25DtwaaIsaxU=
=LsM7
-----END PGP SIGNATURE-----
Merge tag 'arm-dt-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM DT updates from Arnd Bergmann:
"There are 40 branches this time, adding a lot of new hardware support,
and cleanups. Krzysztof Kozlowski continues his treewide cleanups.
There are a number of new SoCs, all of them as part of existing
families, and typically added along with a reference board:
- Renesas RZ/G2UL (R9A07G043) is the single-core version of the
RZ/G2L general-purpose MPU.
- Renesas RZ/V2M (R9A09G011) is a smart camera SoC
- Renesas R-Car V4H (R8A779G0) is an automotive chip with Cortex-A76
cores and deep learning accerlation.
- Broadcom BCM47622 is a new broadband SoC based on a quad Cortex-A7
and dual Wifi-6.
- Corstone1000 is a generic platform from Arm that is used for
designing custom SoCs, the support for now is for the Fixed Virtual
Platform emulation for it.
- Mediatek MT8195 (Kompanio 1200) is a high-end consumer chip used in
upcoming Chromebooks.
- NXP i.MXRT1050 is a Cortex-M7 based microcontroller, the first
MMU-less SoC to be added in a while
New machines based on already supported SoCs this time are mainly for
32-bit platforms and include:
- Two wireless routers based on Broadcom bcm4708
- 30 new boards based on NXP i.MX6, i.MX7 and i.MX8 families, mostly
for the industrial embedded market, and on NXP LS1021A based IOT
board.
- Two ethernet switches based on Microchip LAN966
- Eight Qualcomm Snapdragon based machines, including a smartwatch, a
Chromebook board and some phones
- Another phone based on the old ST-Ericsson Ux500 platform
- Seven STM32MP1 based boards
- Four single-board computers based on Rockchip RK3566/RK3568"
* tag 'arm-dt-5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (791 commits)
ARM: dts: kswitch-d10: enable networking
ARM: dts: lan966x: add switch node
ARM: dts: lan966x: add serdes node
ARM: dts: lan966x: add reset switch reset node
ARM: dts: lan966x: add MIIM nodes
ARM: dts: lan966x: add hwmon node
ARM: dts: lan966x: add basic Kontron KSwitch D10 support
ARM: dts: lan966x: add flexcom I2C nodes
ARM: dts: lan966x: add flexcom SPI nodes
ARM: dts: lan966x: add all flexcom usart nodes
ARM: dts: lan966x: add missing uart DMA channel
ARM: dts: lan966x: add sgpio node
ARM: dts: lan966x: swap dma channels for crypto node
ARM: dts: lan966x: rename pinctrl nodes
ARM: dts: at91: sama7g5: remove interrupt-parent from gic node
ARM: dts: at91: use generic node name for dataflash
ARM: dts: turris-omnia: Add atsha204a node
arm64: dts: mt8192: Follow binding order for SCP registers
arm64: dts: mediatek: add mtk-snfi for mt7622
arm64: dts: mediatek: mt8195-demo: enable uart1
...
Introduce ethernet nodes in mt7986 bindings in order to
enable mt7986a/mt7986b ethernet support.
Co-developed-by: Sam Shih <sam.shih@mediatek.com>
Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
Add a device tree for the n6000 instantiation of Agilex
Hard Processor System (HPS).
Signed-off-by: Matthew Gerlach <matthew.gerlach@linux.intel.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
MDIO devices have #address-cells = <1>, #size-cells = <0>. Now that we
have a schema enforcing this for marvell,orion-mdio we can see that the
turris-mox has a unnecessary 2nd cell for the switch nodes reg property
of it's switch devices. Remove the unnecessary 2nd cell from the
switches reg property.
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Reviewed-by: Marek Behún <kabel@kernel.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
The dt-binding for SCP documents the reg-names order as sram, cfg,
l1tcm. Update the SCP node on the mt8192 devicetree to follow that
order, which gets rid of a dtbs_check warning. This doesn't change any
behavior since the SCP driver accesses the memory regions through the
names anyway.
Fixes: c63556ec6b ("arm64: dts: mt8192: Add SCP node")
Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Link: https://lore.kernel.org/r/20220504214516.2957504-1-nfraprado@collabora.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
This property doesn't seem to exist in the documentation nor
in source code, let's remove it from the device-tree.
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Link: https://lore.kernel.org/r/20220426134106.242353-7-fparent@baylibre.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
Fix the following dtbs_check error by using the correct node name:
/home/fabo/build/linux/mt8183-pumpkin/arch/arm64/boot/dts/mediatek/mt8183-pumpkin.dtb: ntc: $nodename:0: 'ntc' does not match '^thermistor(.*)?$'
From schema: /home/fabo/devel/baylibre/linux-mainline/Documentation/devicetree/bindings/hwmon/ntc-thermistor.yaml
Signed-off-by: Fabien Parent <fparent@baylibre.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com>
Link: https://lore.kernel.org/r/20220426164755.435372-1-fparent@baylibre.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
On an MT7622 system, the kernel complains of not being able to detect the cache
hierarchy of CPU 0. Specify the shared L2 cache node in the device tree, in
order to fix this.
Signed-off-by: Rui Salvaterra <rsalvaterra@gmail.com>
Link: https://lore.kernel.org/r/20220428225755.785153-1-rsalvaterra@gmail.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
