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Author SHA1 Message Date
Aric Cyr
14d68acfd0 drm/amd/display: Fix nanosec stat overflow
[Why]
Nanosec stats can overflow on long running systems potentially causing
statistic logging issues.

[How]
Use 64bit types for nanosec stats to ensure no overflow.

Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Aric Cyr <aric.cyr@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-02-22 10:26:15 -05:00
ChunTao Tso
f980579c29 drm/amd/display: Replay + IPS + ABM in Full Screen VPB
[Why]
Because ABM will wait VStart to start getting histogram data,
 it will cause we can't enter IPS while full screnn video playing.

[How]
Modify the panel refresh rate to the maximun multiple of current
 refresh rate.

Reviewed-by: Dennis Chan <dennis.chan@amd.com>
Acked-by: Roman Li <roman.li@amd.com>
Signed-off-by: ChunTao Tso <chuntao.tso@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-01-22 17:13:27 -05:00
Marcelo Mendes Spessoto Junior
1ac725b300 drm/amd/display: Fix power_helpers.c codestyle
Place define macro expression inside () in power_helpers.c file

Signed-off-by: Marcelo Mendes Spessoto Junior <marcelomspessoto@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-01-05 16:10:44 -05:00
Marcelo Mendes Spessoto Junior
0783f17e76 drm/amd/display: Fix hdcp_log.h codestyle
Place HDCP_EVENT_TRACE(hdcp, event) macro content inside do while loop
to avoid if-else issues in hdcp_log.h file

v2: fix up build (Alex)

Signed-off-by: Marcelo Mendes Spessoto Junior <marcelomspessoto@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-01-05 16:10:44 -05:00
Marcelo Mendes Spessoto Junior
31906f4cf6 drm/amd/display: Fix hdcp2_execution.c codestyle
Remove braces for single statement if expressions and change comparison
order for hdcp2_execution.c file

Signed-off-by: Marcelo Mendes Spessoto Junior <marcelomspessoto@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-01-05 16:10:44 -05:00
Marcelo Mendes Spessoto Junior
30c822afdf drm/amd/display: Fix hdcp_psp.h codestyle
Fix identation inside enum and place expressions in define macros inside
() for hdcp_psp.h file

Signed-off-by: Marcelo Mendes Spessoto Junior <marcelomspessoto@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-01-05 16:10:44 -05:00
Marcelo Mendes Spessoto Junior
0c3c952d05 drm/amd/display: Fix freesync.c codestyle
Remove braces for single statement if expression for freesync.c file

Signed-off-by: Marcelo Mendes Spessoto Junior <marcelomspessoto@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-01-05 16:10:43 -05:00
Marcelo Mendes Spessoto Junior
f28390cd00 drm/amd/display: Fix hdcp_psp.c codestyle
Fix identation for hdcp_psp.c file

Signed-off-by: Marcelo Mendes Spessoto Junior <marcelomspessoto@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-01-05 16:10:43 -05:00
Marcelo Mendes Spessoto Junior
c86e5ab227 drm/amd/display: Fix hdcp1_execution.c codestyle
Remove braces from single statement if expression in hdcp1_execution.c
file

Signed-off-by: Marcelo Mendes Spessoto Junior <marcelomspessoto@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-01-05 16:10:43 -05:00
Marcelo Mendes Spessoto Junior
151374fb6e drm/amd/display: Removing duplicate copyright text
mod_freesync header file has duplicated copyright boilerplate. Drop the
duplicate.

Signed-off-by: Marcelo Mendes Spessoto Junior <marcelomspessoto@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-01-05 16:05:11 -05:00
Joshua Ashton
30afdffb3f drm/amd/display: Fix sending VSC (+ colorimetry) packets for DP/eDP displays without PSR
The check for sending the vsc infopacket to the display was gated behind
PSR (Panel Self Refresh) being enabled.

The vsc infopacket also contains the colorimetry (specifically the
container color gamut) information for the stream on modern DP.

PSR is typically only supported on mobile phone eDP displays, thus this
was not getting sent for typical desktop monitors or TV screens.

This functionality is needed for proper HDR10 functionality on DP as it
wants BT2020 RGB/YCbCr for the container color space.

Cc: stable@vger.kernel.org
Cc: Harry Wentland <harry.wentland@amd.com>
Cc: Xaver Hugl <xaver.hugl@gmail.com>
Cc: Melissa Wen <mwen@igalia.com>
Fixes: 15f9dfd545 ("drm/amd/display: Register Colorspace property for DP and HDMI")
Tested-by: Simon Berz <simon@berz.me>
Tested-by: Xaver Hugl <xaver.hugl@kde.org>
Signed-off-by: Joshua Ashton <joshua@froggi.es>
Signed-off-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-01-05 16:04:42 -05:00
Tom Chung
e379787cbc drm/amd/display: Add some functions for Panel Replay
[WHY]
Prepare for enabling the Panel Replay feature

[HOW]
- Add some Panel Replay setting functions in DC
- Add the Panel Replay resource in dcn35_resource.c
- Add debug masks for Panel Replay

Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Acked-by: Rodrigo Siqueira <rodrigo.siqueira@amd.com>
Reviewed-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Tom Chung <chiahsuan.chung@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2024-01-03 11:16:05 -05:00
Mario Limonciello
571c2fa26a drm/amd/display: Disable PSR-SU on Parade 0803 TCON again
When screen brightness is rapidly changed and PSR-SU is enabled the
display hangs on panels with this TCON even on the latest DCN 3.1.4
microcode (0x8002a81 at this time).

This was disabled previously as commit 072030b178 ("drm/amd: Disable
PSR-SU on Parade 0803 TCON") but reverted as commit 1e66a17ce5 ("Revert
"drm/amd: Disable PSR-SU on Parade 0803 TCON"") in favor of testing for
a new enough microcode (commit cd2e31a9ab ("drm/amd/display: Set minimum
requirement for using PSR-SU on Phoenix")).

As hangs are still happening specifically with this TCON, disable PSR-SU
again for it until it can be root caused.

Cc: stable@vger.kernel.org
Cc: aaron.ma@canonical.com
Cc: binli@gnome.org
Cc: Marc Rossi <Marc.Rossi@amd.com>
Cc: Hamza Mahfooz <Hamza.Mahfooz@amd.com>
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
Link: https://bugs.launchpad.net/ubuntu/+source/linux/+bug/2046131
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-12-13 15:09:54 -05:00
Krunoslav Kovac
c21a764a98 drm/amd/display: Send PQ bit in AMD VSIF
[WHY & HOW]
PB9 bit 5 was added to signal PQ EOTF in AMD vendor specific infoframe.
This change sets it when appropriate.

Reviewed-by: Aric Cyr <aric.cyr@amd.com>
Acked-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Krunoslav Kovac <krunoslav.kovac@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-11-17 09:30:50 -05:00
Muhammad Ansari
43693e859b drm/amd/display: VSIF v3 set Max Refresh Rate
[WHY]
FreeSync spec requires PB8 and PB12 to be set to nominal
refresh rate regardless of fixed rate or variable

[HOW]
Removed the condition that checks and overwrites max refresh rate
and set PB8/PB12 to be set to max refresh rate always

Reviewed-by: Anthony Koo <anthony.koo@amd.com>
Acked-by: Tom Chung <chiahsuan.chung@amd.com>
Signed-off-by: Muhammad Ansari <muhammad.ansari@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-10-09 16:53:02 -04:00
Aric Cyr
889d551545 drm/amd/display: Clean up code warnings
- Fix constness of string parameters
- Fix zero-initialization of structs which cannot take a 0 literal as the
  first field, for example enums

Reviewed-by: Dillon Varone <dillon.varone@amd.com>
Acked-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Aric Cyr <aric.cyr@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-10-04 18:42:01 -04:00
Wayne Lin
52ed23dc29 drm/amd/display: fix problems in power_helper
[Why & How]
Fix following problems:
- In abm config, forget to initialize config.ambient_thresholds_lux.
- Adjust the coding style problem
- Restrict to call psr_su_set_dsc_slice_height() under edp only

Reviewed-by: Robin Chen <robin.chen@amd.com>
Signed-off-by: Wayne Lin <Wayne.Lin@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-10-04 18:35:56 -04:00
Hamza Mahfooz
084f658ece drm/amd/display: prevent potential division by zero errors
There are two places in apply_below_the_range() where it's possible for
a divide by zero error to occur. So, to fix this make sure the divisor
is non-zero before attempting the computation in both cases.

Cc: stable@vger.kernel.org
Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2637
Fixes: a463b26303 ("drm/amd/display: Fix frames_to_insert math")
Fixes: ded6119e82 ("drm/amd/display: Reinstate LFC optimization")
Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-09-06 14:32:39 -04:00
Krunoslav Kovac
959d2fc47f drm/amd/display: PQ regamma end point
[WHY & HOW]
PQ has a fixed range of 0-10,000 nits.
Using 1=80 nits normalization, PQ should map to 1.0 for X=125.0
HW LUT used for interpolation does not have X=125 so it's interpolated.
However, we cap Y to 1 for all X>=125.

The closest larger HW point is 128.
What we want is Y(128) such that interpolation through 125 gives 1.0.
Such value is ~1.00256.
Another change is to hardcode PQ table, we pretty much always have 1=80
normalization so the table can be static.

Reviewed-by: Aric Cyr <aric.cyr@amd.com>
Acked-by: Wayne Lin <wayne.lin@amd.com>
Signed-off-by: Krunoslav Kovac <krunoslav.kovac@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-30 14:58:38 -04:00
Bhawanpreet Lakha
81a7be799a drm/amd/display: Update adaptive sync infopackets for replay
Update infopackets for replay

Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-15 18:08:30 -04:00
Ran Sun
3646a89db1 drm/amd/display: Clean up errors in color_gamma.c
Fix the following errors reported by checkpatch:

ERROR: trailing whitespace
ERROR: else should follow close brace '}'

Signed-off-by: Ran Sun <sunran001@208suo.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-09 09:42:47 -04:00
Bhawanpreet Lakha
dede1fea44 drm/amd/display: Add Freesync Panel DM code
We need certain conditions for replay to be enabled, so create an
interface in DM to enable/disable replay.

Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-08-07 17:14:07 -04:00
Austin Zheng
da55037afd drm/amd/display: Limit Minimum FreeSync Refresh Rate
Why:
Some EDIDs report a minimum refresh rate lower than what HW can support

How:
Add a check to calculate minimum supported refresh rate with current timing
and use that as the minimum if a lower one is passed in

Acked-by: Stylon Wang <stylon.wang@amd.com>
Signed-off-by: Austin Zheng <austin.zheng@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-06-15 10:44:49 -04:00
Tom Rix
4e004146c0 drm/amd/display: set variable custom_backlight_curve0 storage-class-specifier to static
smatch reports
drivers/gpu/drm/amd/amdgpu/../display/modules/power/power_helpers.c:119:31:
  warning: symbol 'custom_backlight_curve0' was not declared. Should it be static?

This variable is only used in its defining file, so it should be static

Signed-off-by: Tom Rix <trix@redhat.com>
Signed-off-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-06-09 09:23:18 -04:00
Josip Pavic
5e9252d841 drm/amd/display: add option to use custom backlight caps
[Why & How]
Provide option for vendors to specify a custom brightness-to-backlight
conversion profile.

Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Josip Pavic <Josip.Pavic@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-04-24 18:36:46 -04:00
Tom Rix
94344e62a9 drm/amd/display: remove unused variable oldest_index
cpp_check reports
drivers/gpu/drm/amd/display/modules/freesync/freesync.c:1143:17: style: Variable
  'oldest_index' is assigned a value that is never used. [unreadVariable]
   oldest_index = 0;
                ^

This variable is not used so remove.

Signed-off-by: Tom Rix <trix@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-04-18 16:28:54 -04:00
Alex Hung
21fc0ff38f drm/amd/display: fix a divided-by-zero error
[Why & How]

timing.dsc_cfg.num_slices_v can be zero and it is necessary to check
before using it.

This fixes the error "divide error: 0000 [#1] PREEMPT SMP NOPTI".

Reviewed-by: Aurabindo Pillai <Aurabindo.Pillai@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Hung <alex.hung@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-04-18 16:28:53 -04:00
Tom Rix
583da1b82a drm/amd/display: remove unused average_render_time_in_us and i variables
clang with W=1 reports
drivers/gpu/drm/amd/amdgpu/../display/modules/freesync/freesync.c:1132:15: error: variable
  'average_render_time_in_us' set but not used [-Werror,-Wunused-but-set-variable]
        unsigned int average_render_time_in_us = 0;
                     ^
This variable is not used so remove it, which caused i to be unused so remove that as well.

Signed-off-by: Tom Rix <trix@redhat.com>
Signed-off-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-04-11 18:03:22 -04:00
Jiapeng Chong
4cf3ae9d8e drm/amd/display: Clean up some inconsistent indenting
No functional modification involved.

Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Link: https://bugzilla.openanolis.cn/show_bug.cgi?id=4585
Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
Signed-off-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-03-27 18:20:32 -04:00
Harry Wentland
c186c13e65 drm/amd/display: Drop unnecessary DCN guards
[Why & How]
DC is littered with many DCN guards that are not needed.
Drop them.

Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-03-07 14:22:40 -05:00
Harry Wentland
1e88eb1b2c drm/amd/display: Drop CONFIG_DRM_AMD_DC_HDCP
[Why & How]
There is no reason we still need a config option for this.

Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-03-07 14:22:39 -05:00
Aric Cyr
627441f5a5 Revert "drm/amd/display: Fix FreeSync active bit issue"
This reverts commit 6cfb6df2d6.

[Why & How]
Original change causes black screen. Revert
until fix is available.

Reviewed-by: Aric Cyr <aric.cyr@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Aric Cyr <aric.cyr@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-02-28 14:30:00 -05:00
Jasdeep Dhillon
c32699caec drm/amd/display: Updating Video Format Fall Back Policy.
[WHY]
Adding 1920x1080 as fail safe mode for
Video Format Fall Back Policy.

Reviewed-by: Jerry Zuo <Jerry.Zuo@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Jasdeep Dhillon <jdhillon@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-02-28 14:29:35 -05:00
Melissa Wen
9a13ff8f52 drm/amd/display: remove unused _calculate_degamma_curve function
We don't use this function anywhere, therefore, remove it.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Melissa Wen <mwen@igalia.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-02-15 22:24:26 -05:00
Melissa Wen
af54167d2b drm/amd/display: unset initial value for tf since it's never used
In mod_color_calculate_{degamma/regamma}_params(), a tf variable is
initialized as TRANSFER_FUNCTION_SRGB but tf is only used after tf =
input->tf, therefore, better to just remove this initial value and avoid
misleading interpretations.

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Melissa Wen <mwen@igalia.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-02-15 22:24:20 -05:00
Melissa Wen
6ff387e889 drm/amd/display: camel case cleanup in color_gamma file
Rename mapUserRamp to map_user_ramp and doClamping to do_clamping

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Melissa Wen <mwen@igalia.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-02-15 22:24:15 -05:00
Leo (Hanghong) Ma
6cfb6df2d6 drm/amd/display: Fix FreeSync active bit issue
[Why]
The FreeSync active bit unconditionally set in HDMI VSIF.

[How]
Set this bit to true when FAMS is enable on desktop.

Reviewed-by: Felipe Clark <felipe.clark@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Leo (Hanghong) Ma <hanghong.ma@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-02-14 16:06:10 -05:00
Sung Joon Kim
5b49da02dd drm/amd/display: Enable Freesync over PCon
[why]
Enable Freesync over PCon on Linux environment.

[how]
Adding Freesync over PCon support in amdgpu_dm
- Read DPCD for Freesync over PCon capabilitiy
- Add whitelist for compatible branch devices

Reviewed-by: Chao-kai Wang <Stylon.Wang@amd.com>
Acked-by: Alex Hung <alex.hung@amd.com>
Signed-off-by: Sung Joon Kim <sungkim@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-01-31 14:00:44 -05:00
Robin Chen
c84ff24a77 drm/amd/display: Pass DSC slice height to PSR FW
[Why]
When DSC is enabled, the PSRSU seletive update region
must be multiple number of DSC slice height number.
The original solution is to overwrite the SU Y granularity
by DSC slice height in DAL driver. However, the size
of the SU Y granularity variable only has 8 bytes
and the DSC slice height may over the 8 bytes size.

[How]
Instead of overwriting the SU Y granularity value,
add a new DSC slice height pararmeter and pass it
to DMUB PSRSU FW. The PSRSU FW will refer to the
DSC slice height value and extend the SU region.

Reviewed-by: Dennis Chan <dennis.chan@amd.com>
Reviewed-by: ChunTao Tso <chuntao.tso@amd.com>
Acked-by: Alan Liu <HaoPing.Liu@amd.com>
Signed-off-by: Robin Chen <robin.chen@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-01-24 13:26:25 -05:00
Sung Joon Kim
e95afc1cf7 drm/amd/display: Enable AdaptiveSync in DC interface
[why]
Start enabling AdaptiveSync feature on Linux environment.

[how]
Adding AdaptiveSync support in DC layer
- building AdaptiveSync info_packets
- adjusting the v_startup parameter

Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Alan Liu <HaoPing.Liu@amd.com>
Signed-off-by: Sung Joon Kim <sungjoon.kim@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-01-24 13:26:25 -05:00
Dillon Varone
689008e11f drm/amd/display: set active bit for desktop with VSDBv3
When using freesync on desktop, need to set freesync active bit for AMD
VSDBv3 infopacket.

Tested-by: Daniel Wheeler <Daniel.Wheeler@amd.com>
Reviewed-by: Martin Leung <Martin.Leung@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Dillon Varone <Dillon.Varone@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-01-17 15:39:58 -05:00
Rodrigo Siqueira
2eb82aaa58 drm/amd/display: Remove unused code
Remove some code that is never used from freesync file.

Tested-by: Daniel Wheeler <Daniel.Wheeler@amd.com>
Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-01-17 15:39:50 -05:00
Hamza Mahfooz
13b90cf900 drm/amd/display: fix PSR-SU/DSC interoperability support
Currently, there are issues with enabling PSR-SU + DSC. This stems from
the fact that DSC imposes a slice height on transmitted video data and
we are not conforming to that slice height in PSR-SU regions. So, pass
slice_height into su_y_granularity to feed the DSC slice height into
PSR-SU code.

Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-01-09 17:02:18 -05:00
Camille Cho
2aae59444c drm/amd/display: new ABM config 2
[Why & How]
Add configuration 2 for ABM 2.3/2.4 to suit customer preferences, which
is to lower the brightness curves in 80%-100% range compared to the
existing default config 0.

Reviewed-by: Josip Pavic <Josip.Pavic@amd.com>
Acked-by: Brian Chang <Brian.Chang@amd.com>
Signed-off-by: Camille Cho <Camille.Cho@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-11-23 09:47:13 -05:00
Mike Hsieh
52b5432cd7 drm/amd/display: Set correct EOTF and Gamut flag in VRR info
[Why] FreeSync always use G2.2 EOTF and Native gamut
[How] Set EOTF and Gamut flags accordingly

Reviewed-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com>
Acked-by: Alan Liu <HaoPing.Liu@amd.com>
Signed-off-by: Mike Hsieh <Mike.Hsieh@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-11-09 17:41:41 -05:00
Nawwar Ali
a36021b1fc drm/amd/display: Update 709 gamma to 2.222 as stated in the standerd
[WHY]
    Previously driver use gamma 2.2 for 709 color space,
    but the standard is to use gamma of 2.222

[HOW]
    Change it gamma to 2.222

Reviewed-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com>
Acked-by: Alan Liu <HaoPing.Liu@amd.com>
Signed-off-by: Nawwar Ali <nawwar.ali@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-11-09 17:24:40 -05:00
Ma Hanghong
b1a98cf89a drm/amd/display: Wrong colorimetry workaround
[Why]
For FreeSync HDR, native color space flag in AMD VSIF(BT.709) should be
used when intepreting content and color space flag in VSC or AVI
infoFrame should be ignored. However, it turned out some userspace
application still use color flag in VSC or AVI infoFrame which is
incorrect.

[How]
Transfer function is used when building the VSC and AVI infoFrame. Set
colorimetry to BT.709 when all the following match:

1. Pixel format is YCbCr;
2. In FreeSync 2 HDR, color is COLOR_SPACE_2020_YCBCR;
3. Transfer function is TRANSFER_FUNC_GAMMA_22;

Tested-by: Mark Broadworth <mark.broadworth@amd.com>
Reviewed-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Ma Hanghong <hanghong.ma@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-10-27 14:45:14 -04:00
Alex Deucher
a895014853 drm/amd/display: fix transfer function passed to build_coefficients()
The default argument should be enum TRANSFER_FUNCTION_SRGB rather than
the current boolean value which improperly maps to
TRANSFER_FUNCTION_BT709.

Commit 9b3d76527f ("drm/amd/display: Revert adding degamma coefficients")
looks to have improperly reverted
commit d020970959 ("drm/amd/display: Add regamma/degamma coefficients and set sRGB when TF is BT709")
replacing the enum value with a boolean value.

Cc: Krunoslav Kovac <Krunoslav.Kovac@amd.com>
Cc: Jaehyun Chung <jaehyun.chung@amd.com>
Cc: Zeng Heng <zengheng4@huawei.com>
Fixes: 9b3d76527f ("drm/amd/display: Revert adding degamma coefficients")
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-10-11 11:33:31 -04:00
Yao Wang1
61e4de65b9 drm/amd/display: Limit user regamma to a valid value
[Why]
For HDR mode, we get total 512 tf_point and after switching to SDR mode
we actually get 400 tf_point and the rest of points(401~512) still use
dirty value from HDR mode. We should limit the rest of the points to max
value.

[How]
Limit the value when coordinates_x.x > 1, just like what we do in
translate_from_linear_space for other re-gamma build paths.

Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Reviewed-by: Krunoslav Kovac <Krunoslav.Kovac@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Pavle Kotarac <Pavle.Kotarac@amd.com>
Signed-off-by: Yao Wang1 <Yao.Wang1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-09-13 14:33:00 -04:00
Leo Ma
0591183699 drm/amd/display: Fix HDMI VSIF V3 incorrect issue
[Why]
Reported from customer the checksum in AMD VSIF V3 is incorrect and
causing blank screen issue.

[How]
Fix the packet length issue on AMD HDMI VSIF V3.

Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Tom Chung <chiahsuan.chung@amd.com>
Signed-off-by: Leo Ma <hanghong.ma@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2022-08-10 15:12:13 -04:00