dma-buf: - add dma_resv_replace_fences - add dma_resv_get_singleton - make dma_excl_fence private core: - EDID parser refactorings - switch drivers to drm_mode_copy/duplicate - DRM managed mutex initialization display-helper: - put HDMI, SCDC, HDCP, DSC and DP into new module gem: - rework fence handling ttm: - rework bulk move handling - add common debugfs for resource managers - convert to kvcalloc format helpers: - support monochrome formats - RGB888, RGB565 to XRGB8888 conversions fbdev: - cfb/sys_imageblit fixes - pagelist corruption fix - create offb platform device - deferred io improvements sysfb: - Kconfig rework - support for VESA mode selection bridge: - conversions to devm_drm_of_get_bridge - conversions to panel_bridge - analogix_dp - autosuspend support - it66121 - audio support - tc358767 - DSI to DPI support - icn6211 - PLL/I2C fixes, DT property - adv7611 - enable DRM_BRIDGE_OP_HPD - anx7625 - fill ELD if no monitor - dw_hdmi - add audio support - lontium LT9211 support, i.MXMP LDB - it6505: Kconfig fix, DPCD set power fix - adv7511 - CEC support for ADV7535 panel: - ltk035c5444t, B133UAN01, NV3052C panel support - DataImage FG040346DSSWBG04 support - st7735r - DT bindings fix - ssd130x - fixes i915: - DG2 laptop PCI-IDs ("motherboard down") - Initial RPL-P PCI IDs - compute engine ABI - DG2 Tile4 support - DG2 CCS clear color compression support - DG2 render/media compression formats support - ATS-M platform info - RPL-S PCI IDs added - Bump ADL-P DMC version to v2.16 - Support static DRRS - Support multiple eDP/LVDS native mode refresh rates - DP HDR support for HSW+ - Lots of display refactoring + fixes - GuC hwconfig support and query - sysfs support for multi-tile - fdinfo per-client gpu utilisation - add geometry subslices query - fix prime mmap with LMEM - fix vm open count and remove vma refcounts - contiguous allocation fixes - steered register write support - small PCI BAR enablement - GuC error capture support - sunset igpu legacy mmap support for newer devices - GuC version 70.1.1 support amdgpu: - Initial SoC21 support - SMU 13.x enablement - SMU 13.0.4 support - ttm_eu cleanups - USB-C, GPUVM updates - TMZ fixes for RV - RAS support for VCN - PM sysfs code cleanup - DC FP rework - extend CG/PG flags to 64-bit - SI dpm lockdep fix - runtime PM fixes amdkfd: - RAS/SVM fixes - TLB flush fixes - CRIU GWS support - ignore bogus MEC signals more efficiently msm: - Fourcc modifier for tiled but not compressed layouts - Support for userspace allocated IOVA (GPU virtual address) - DPU: DSC (Display Stream Compression) support - DP: eDP support - DP: conversion to use drm_bridge and drm_bridge_connector - Merge DPU1 and MDP5 MDSS driver - DPU: writeback support nouveau: - make some structures static - make some variables static - switch to drm_gem_plane_helper_prepare_fb radeon: - misc fixes/cleanups mxsfb: - rework crtc mode setting - LCDIF CRC support etnaviv: - fencing improvements - fix address space collisions - cleanup MMU reference handling gma500: - GEM/GTT improvements - connector handling fixes komeda: - switch to plane reset helper mediatek: - MIPI DSI improvements omapdrm: - GEM improvements qxl: - aarch64 support vc4: - add a CL submission tracepoint - HDMI YUV support - HDMI/clock improvements - drop is_hdmi caching virtio: - remove restriction of non-zero blob types vmwgfx: - support for cursormob and cursorbypass 4 - fence improvements tidss: - reset DISPC on startup solomon: - SPI support - DT improvements sun4i: - allwinner D1 support - drop is_hdmi caching imx: - use swap() instead of open-coding - use devm_platform_ioremap_resource - remove redunant initializations ast: - Displayport support rockchip: - Refactor IOMMU initialisation - make some structures static - replace drm_detect_hdmi_monitor with drm_display_info.is_hdmi - support swapped YUV formats, - clock improvements - rk3568 support - VOP2 support mediatek: - MT8186 support tegra: - debugabillity improvements -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEEEKbZHaGwW9KfbeusDHTzWXnEhr4FAmKNxkAACgkQDHTzWXnE hr4hghAAqSXeMEw1w34miyM28hcOpXqkDfT1VVooqFxBT8MBqamzpZvCH94qsZwm 3DRXlhQ4pk8wzUcWJpGprdNakxNQPpFVs2UuxYxOyrxYpdkbOwqsEcM3d8VXD9Cy E36z+dr85A8Te/J0Yg/FLoZMHulTlidqEZeOz6SMaNUohtrmH/oPWR+cPIy4/Zpp yysfbBSKTwblJFDf4+nIpks/VvJYAUO3i6KClT/Rh79Yg6de582AU0YaNcEArTi6 JqdiYIoYLx609Ecy5NVme6wR/ai46afFLMYt3ZIP4OfHRINk+YL01BYMo2JE2M8l xjOH0Iwb7evzWqLK/ESwqp3P7nyppmLlfbZOFHWUfNJsjq2H3ePaAGhzOlYx1c70 XENzY4IvpYYdR0pJuh1gw1cNZfM9JDAynGJ5jvsATLGBGQbpFsy3w/PMZT17q8an DpBwqQmShUdCJ2m+6zznC3VsxJpbvWKNE1I93NxAWZXmFYxoHCzRihahUxKcNDrQ ZLH7RSlk9SE/ZtNSLkU15YnKtoW+ThFIssUpVio6U/fZot1+efZkmkXplSuFvj6R i7s14hMWQjSJzpJg1DXfhDMycEOujNiQppCG2EaDlVxvUtCqYBd3EHOI7KQON//+ iVtmEEnWh5rcCM+WsxLGf3Y7sVP3vfo1LOCxshb1XVfDmeMksoI= =BYQA -----END PGP SIGNATURE----- Merge tag 'drm-next-2022-05-25' of git://anongit.freedesktop.org/drm/drm Pull drm updates from Dave Airlie: "Intel have enabled DG2 on certain SKUs for laptops, AMD has started some new GPU support, msm has user allocated VA controls dma-buf: - add dma_resv_replace_fences - add dma_resv_get_singleton - make dma_excl_fence private core: - EDID parser refactorings - switch drivers to drm_mode_copy/duplicate - DRM managed mutex initialization display-helper: - put HDMI, SCDC, HDCP, DSC and DP into new module gem: - rework fence handling ttm: - rework bulk move handling - add common debugfs for resource managers - convert to kvcalloc format helpers: - support monochrome formats - RGB888, RGB565 to XRGB8888 conversions fbdev: - cfb/sys_imageblit fixes - pagelist corruption fix - create offb platform device - deferred io improvements sysfb: - Kconfig rework - support for VESA mode selection bridge: - conversions to devm_drm_of_get_bridge - conversions to panel_bridge - analogix_dp - autosuspend support - it66121 - audio support - tc358767 - DSI to DPI support - icn6211 - PLL/I2C fixes, DT property - adv7611 - enable DRM_BRIDGE_OP_HPD - anx7625 - fill ELD if no monitor - dw_hdmi - add audio support - lontium LT9211 support, i.MXMP LDB - it6505: Kconfig fix, DPCD set power fix - adv7511 - CEC support for ADV7535 panel: - ltk035c5444t, B133UAN01, NV3052C panel support - DataImage FG040346DSSWBG04 support - st7735r - DT bindings fix - ssd130x - fixes i915: - DG2 laptop PCI-IDs ("motherboard down") - Initial RPL-P PCI IDs - compute engine ABI - DG2 Tile4 support - DG2 CCS clear color compression support - DG2 render/media compression formats support - ATS-M platform info - RPL-S PCI IDs added - Bump ADL-P DMC version to v2.16 - Support static DRRS - Support multiple eDP/LVDS native mode refresh rates - DP HDR support for HSW+ - Lots of display refactoring + fixes - GuC hwconfig support and query - sysfs support for multi-tile - fdinfo per-client gpu utilisation - add geometry subslices query - fix prime mmap with LMEM - fix vm open count and remove vma refcounts - contiguous allocation fixes - steered register write support - small PCI BAR enablement - GuC error capture support - sunset igpu legacy mmap support for newer devices - GuC version 70.1.1 support amdgpu: - Initial SoC21 support - SMU 13.x enablement - SMU 13.0.4 support - ttm_eu cleanups - USB-C, GPUVM updates - TMZ fixes for RV - RAS support for VCN - PM sysfs code cleanup - DC FP rework - extend CG/PG flags to 64-bit - SI dpm lockdep fix - runtime PM fixes amdkfd: - RAS/SVM fixes - TLB flush fixes - CRIU GWS support - ignore bogus MEC signals more efficiently msm: - Fourcc modifier for tiled but not compressed layouts - Support for userspace allocated IOVA (GPU virtual address) - DPU: DSC (Display Stream Compression) support - DP: eDP support - DP: conversion to use drm_bridge and drm_bridge_connector - Merge DPU1 and MDP5 MDSS driver - DPU: writeback support nouveau: - make some structures static - make some variables static - switch to drm_gem_plane_helper_prepare_fb radeon: - misc fixes/cleanups mxsfb: - rework crtc mode setting - LCDIF CRC support etnaviv: - fencing improvements - fix address space collisions - cleanup MMU reference handling gma500: - GEM/GTT improvements - connector handling fixes komeda: - switch to plane reset helper mediatek: - MIPI DSI improvements omapdrm: - GEM improvements qxl: - aarch64 support vc4: - add a CL submission tracepoint - HDMI YUV support - HDMI/clock improvements - drop is_hdmi caching virtio: - remove restriction of non-zero blob types vmwgfx: - support for cursormob and cursorbypass 4 - fence improvements tidss: - reset DISPC on startup solomon: - SPI support - DT improvements sun4i: - allwinner D1 support - drop is_hdmi caching imx: - use swap() instead of open-coding - use devm_platform_ioremap_resource - remove redunant initializations ast: - Displayport support rockchip: - Refactor IOMMU initialisation - make some structures static - replace drm_detect_hdmi_monitor with drm_display_info.is_hdmi - support swapped YUV formats, - clock improvements - rk3568 support - VOP2 support mediatek: - MT8186 support tegra: - debugabillity improvements" * tag 'drm-next-2022-05-25' of git://anongit.freedesktop.org/drm/drm: (1740 commits) drm/i915/dsi: fix VBT send packet port selection for ICL+ drm/i915/uc: Fix undefined behavior due to shift overflowing the constant drm/i915/reg: fix undefined behavior due to shift overflowing the constant drm/i915/gt: Fix use of static in macro mismatch drm/i915/audio: fix audio code enable/disable pipe logging drm/i915: Fix CFI violation with show_dynamic_id() drm/i915: Fix 'mixing different enum types' warnings in intel_display_power.c drm/i915/gt: Fix build error without CONFIG_PM drm/msm/dpu: handle pm_runtime_get_sync() errors in bind path drm/msm/dpu: add DRM_MODE_ROTATE_180 back to supported rotations drm/msm: don't free the IRQ if it was not requested drm/msm/dpu: limit writeback modes according to max_linewidth drm/amd: Don't reset dGPUs if the system is going to s2idle drm/amdgpu: Unmap legacy queue when MES is enabled drm: msm: fix possible memory leak in mdp5_crtc_cursor_set() drm/msm: Fix fb plane offset calculation drm/msm/a6xx: Fix refcount leak in a6xx_gpu_init drm/msm/dsi: don't powerup at modeset time for parade-ps8640 drm/rockchip: Change register space names in vop2 dt-bindings: display: rockchip: make reg-names mandatory for VOP2 ...
481 lines
12 KiB
C
481 lines
12 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2012-2020, The Linux Foundation. All rights reserved.
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*/
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#include "dp_panel.h"
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#include <drm/drm_connector.h>
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#include <drm/drm_edid.h>
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#include <drm/drm_print.h>
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struct dp_panel_private {
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struct device *dev;
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struct drm_device *drm_dev;
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struct dp_panel dp_panel;
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struct drm_dp_aux *aux;
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struct dp_link *link;
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struct dp_catalog *catalog;
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bool panel_on;
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bool aux_cfg_update_done;
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};
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static int dp_panel_read_dpcd(struct dp_panel *dp_panel)
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{
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int rc = 0;
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size_t len;
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ssize_t rlen;
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struct dp_panel_private *panel;
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struct dp_link_info *link_info;
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u8 *dpcd, major = 0, minor = 0, temp;
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u32 offset = DP_DPCD_REV;
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dpcd = dp_panel->dpcd;
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panel = container_of(dp_panel, struct dp_panel_private, dp_panel);
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link_info = &dp_panel->link_info;
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rlen = drm_dp_dpcd_read(panel->aux, offset,
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dpcd, (DP_RECEIVER_CAP_SIZE + 1));
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if (rlen < (DP_RECEIVER_CAP_SIZE + 1)) {
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DRM_ERROR("dpcd read failed, rlen=%zd\n", rlen);
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if (rlen == -ETIMEDOUT)
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rc = rlen;
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else
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rc = -EINVAL;
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goto end;
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}
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temp = dpcd[DP_TRAINING_AUX_RD_INTERVAL];
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/* check for EXTENDED_RECEIVER_CAPABILITY_FIELD_PRESENT */
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if (temp & BIT(7)) {
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drm_dbg_dp(panel->drm_dev,
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"using EXTENDED_RECEIVER_CAPABILITY_FIELD\n");
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offset = DPRX_EXTENDED_DPCD_FIELD;
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}
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rlen = drm_dp_dpcd_read(panel->aux, offset,
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dpcd, (DP_RECEIVER_CAP_SIZE + 1));
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if (rlen < (DP_RECEIVER_CAP_SIZE + 1)) {
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DRM_ERROR("dpcd read failed, rlen=%zd\n", rlen);
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if (rlen == -ETIMEDOUT)
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rc = rlen;
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else
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rc = -EINVAL;
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goto end;
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}
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link_info->revision = dpcd[DP_DPCD_REV];
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major = (link_info->revision >> 4) & 0x0f;
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minor = link_info->revision & 0x0f;
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link_info->rate = drm_dp_bw_code_to_link_rate(dpcd[DP_MAX_LINK_RATE]);
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link_info->num_lanes = dpcd[DP_MAX_LANE_COUNT] & DP_MAX_LANE_COUNT_MASK;
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if (link_info->num_lanes > dp_panel->max_dp_lanes)
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link_info->num_lanes = dp_panel->max_dp_lanes;
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/* Limit support upto HBR2 until HBR3 support is added */
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if (link_info->rate >= (drm_dp_bw_code_to_link_rate(DP_LINK_BW_5_4)))
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link_info->rate = drm_dp_bw_code_to_link_rate(DP_LINK_BW_5_4);
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drm_dbg_dp(panel->drm_dev, "version: %d.%d\n", major, minor);
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drm_dbg_dp(panel->drm_dev, "link_rate=%d\n", link_info->rate);
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drm_dbg_dp(panel->drm_dev, "lane_count=%d\n", link_info->num_lanes);
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if (drm_dp_enhanced_frame_cap(dpcd))
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link_info->capabilities |= DP_LINK_CAP_ENHANCED_FRAMING;
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dp_panel->dfp_present = dpcd[DP_DOWNSTREAMPORT_PRESENT];
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dp_panel->dfp_present &= DP_DWN_STRM_PORT_PRESENT;
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if (dp_panel->dfp_present && (dpcd[DP_DPCD_REV] > 0x10)) {
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dp_panel->ds_port_cnt = dpcd[DP_DOWN_STREAM_PORT_COUNT];
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dp_panel->ds_port_cnt &= DP_PORT_COUNT_MASK;
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len = DP_DOWNSTREAM_PORTS * DP_DOWNSTREAM_CAP_SIZE;
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rlen = drm_dp_dpcd_read(panel->aux,
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DP_DOWNSTREAM_PORT_0, dp_panel->ds_cap_info, len);
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if (rlen < len) {
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DRM_ERROR("ds port status failed, rlen=%zd\n", rlen);
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rc = -EINVAL;
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goto end;
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}
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}
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end:
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return rc;
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}
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static u32 dp_panel_get_supported_bpp(struct dp_panel *dp_panel,
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u32 mode_edid_bpp, u32 mode_pclk_khz)
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{
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struct dp_link_info *link_info;
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const u32 max_supported_bpp = 30, min_supported_bpp = 18;
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u32 bpp = 0, data_rate_khz = 0;
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bpp = min_t(u32, mode_edid_bpp, max_supported_bpp);
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link_info = &dp_panel->link_info;
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data_rate_khz = link_info->num_lanes * link_info->rate * 8;
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while (bpp > min_supported_bpp) {
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if (mode_pclk_khz * bpp <= data_rate_khz)
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break;
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bpp -= 6;
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}
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return bpp;
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}
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static int dp_panel_update_modes(struct drm_connector *connector,
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struct edid *edid)
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{
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int rc = 0;
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if (edid) {
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rc = drm_connector_update_edid_property(connector, edid);
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if (rc) {
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DRM_ERROR("failed to update edid property %d\n", rc);
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return rc;
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}
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rc = drm_add_edid_modes(connector, edid);
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return rc;
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}
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rc = drm_connector_update_edid_property(connector, NULL);
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if (rc)
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DRM_ERROR("failed to update edid property %d\n", rc);
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return rc;
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}
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int dp_panel_read_sink_caps(struct dp_panel *dp_panel,
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struct drm_connector *connector)
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{
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int rc = 0, bw_code;
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int rlen, count;
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struct dp_panel_private *panel;
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if (!dp_panel || !connector) {
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DRM_ERROR("invalid input\n");
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return -EINVAL;
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}
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panel = container_of(dp_panel, struct dp_panel_private, dp_panel);
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rc = dp_panel_read_dpcd(dp_panel);
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if (rc) {
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DRM_ERROR("read dpcd failed %d\n", rc);
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return rc;
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}
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bw_code = drm_dp_link_rate_to_bw_code(dp_panel->link_info.rate);
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if (!is_link_rate_valid(bw_code) ||
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!is_lane_count_valid(dp_panel->link_info.num_lanes) ||
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(bw_code > dp_panel->max_bw_code)) {
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DRM_ERROR("Illegal link rate=%d lane=%d\n", dp_panel->link_info.rate,
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dp_panel->link_info.num_lanes);
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return -EINVAL;
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}
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if (dp_panel->dfp_present) {
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rlen = drm_dp_dpcd_read(panel->aux, DP_SINK_COUNT,
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&count, 1);
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if (rlen == 1) {
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count = DP_GET_SINK_COUNT(count);
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if (!count) {
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DRM_ERROR("no downstream ports connected\n");
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panel->link->sink_count = 0;
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rc = -ENOTCONN;
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goto end;
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}
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}
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}
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kfree(dp_panel->edid);
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dp_panel->edid = NULL;
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dp_panel->edid = drm_get_edid(connector,
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&panel->aux->ddc);
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if (!dp_panel->edid) {
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DRM_ERROR("panel edid read failed\n");
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/* check edid read fail is due to unplug */
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if (!dp_catalog_link_is_connected(panel->catalog)) {
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rc = -ETIMEDOUT;
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goto end;
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}
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}
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if (panel->aux_cfg_update_done) {
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drm_dbg_dp(panel->drm_dev,
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"read DPCD with updated AUX config\n");
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rc = dp_panel_read_dpcd(dp_panel);
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bw_code = drm_dp_link_rate_to_bw_code(dp_panel->link_info.rate);
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if (rc || !is_link_rate_valid(bw_code) ||
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!is_lane_count_valid(dp_panel->link_info.num_lanes)
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|| (bw_code > dp_panel->max_bw_code)) {
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DRM_ERROR("read dpcd failed %d\n", rc);
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return rc;
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}
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panel->aux_cfg_update_done = false;
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}
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end:
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return rc;
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}
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u32 dp_panel_get_mode_bpp(struct dp_panel *dp_panel,
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u32 mode_edid_bpp, u32 mode_pclk_khz)
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{
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struct dp_panel_private *panel;
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u32 bpp;
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if (!dp_panel || !mode_edid_bpp || !mode_pclk_khz) {
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DRM_ERROR("invalid input\n");
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return 0;
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}
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panel = container_of(dp_panel, struct dp_panel_private, dp_panel);
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if (dp_panel->video_test)
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bpp = dp_link_bit_depth_to_bpp(
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panel->link->test_video.test_bit_depth);
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else
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bpp = dp_panel_get_supported_bpp(dp_panel, mode_edid_bpp,
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mode_pclk_khz);
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return bpp;
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}
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int dp_panel_get_modes(struct dp_panel *dp_panel,
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struct drm_connector *connector)
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{
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if (!dp_panel) {
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DRM_ERROR("invalid input\n");
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return -EINVAL;
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}
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if (dp_panel->edid)
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return dp_panel_update_modes(connector, dp_panel->edid);
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return 0;
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}
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static u8 dp_panel_get_edid_checksum(struct edid *edid)
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{
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struct edid *last_block;
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u8 *raw_edid;
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bool is_edid_corrupt = false;
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if (!edid) {
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DRM_ERROR("invalid edid input\n");
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return 0;
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}
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raw_edid = (u8 *)edid;
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raw_edid += (edid->extensions * EDID_LENGTH);
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last_block = (struct edid *)raw_edid;
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/* block type extension */
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drm_edid_block_valid(raw_edid, 1, false, &is_edid_corrupt);
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if (!is_edid_corrupt)
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return last_block->checksum;
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DRM_ERROR("Invalid block, no checksum\n");
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return 0;
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}
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void dp_panel_handle_sink_request(struct dp_panel *dp_panel)
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{
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struct dp_panel_private *panel;
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if (!dp_panel) {
|
|
DRM_ERROR("invalid input\n");
|
|
return;
|
|
}
|
|
|
|
panel = container_of(dp_panel, struct dp_panel_private, dp_panel);
|
|
|
|
if (panel->link->sink_request & DP_TEST_LINK_EDID_READ) {
|
|
u8 checksum;
|
|
|
|
if (dp_panel->edid)
|
|
checksum = dp_panel_get_edid_checksum(dp_panel->edid);
|
|
else
|
|
checksum = dp_panel->connector->real_edid_checksum;
|
|
|
|
dp_link_send_edid_checksum(panel->link, checksum);
|
|
dp_link_send_test_response(panel->link);
|
|
}
|
|
}
|
|
|
|
void dp_panel_tpg_config(struct dp_panel *dp_panel, bool enable)
|
|
{
|
|
struct dp_catalog *catalog;
|
|
struct dp_panel_private *panel;
|
|
|
|
if (!dp_panel) {
|
|
DRM_ERROR("invalid input\n");
|
|
return;
|
|
}
|
|
|
|
panel = container_of(dp_panel, struct dp_panel_private, dp_panel);
|
|
catalog = panel->catalog;
|
|
|
|
if (!panel->panel_on) {
|
|
drm_dbg_dp(panel->drm_dev,
|
|
"DP panel not enabled, handle TPG on next on\n");
|
|
return;
|
|
}
|
|
|
|
if (!enable) {
|
|
dp_catalog_panel_tpg_disable(catalog);
|
|
return;
|
|
}
|
|
|
|
drm_dbg_dp(panel->drm_dev, "calling catalog tpg_enable\n");
|
|
dp_catalog_panel_tpg_enable(catalog, &panel->dp_panel.dp_mode.drm_mode);
|
|
}
|
|
|
|
void dp_panel_dump_regs(struct dp_panel *dp_panel)
|
|
{
|
|
struct dp_catalog *catalog;
|
|
struct dp_panel_private *panel;
|
|
|
|
panel = container_of(dp_panel, struct dp_panel_private, dp_panel);
|
|
catalog = panel->catalog;
|
|
|
|
dp_catalog_dump_regs(catalog);
|
|
}
|
|
|
|
int dp_panel_timing_cfg(struct dp_panel *dp_panel)
|
|
{
|
|
u32 data, total_ver, total_hor;
|
|
struct dp_catalog *catalog;
|
|
struct dp_panel_private *panel;
|
|
struct drm_display_mode *drm_mode;
|
|
|
|
panel = container_of(dp_panel, struct dp_panel_private, dp_panel);
|
|
catalog = panel->catalog;
|
|
drm_mode = &panel->dp_panel.dp_mode.drm_mode;
|
|
|
|
drm_dbg_dp(panel->drm_dev, "width=%d hporch= %d %d %d\n",
|
|
drm_mode->hdisplay, drm_mode->htotal - drm_mode->hsync_end,
|
|
drm_mode->hsync_start - drm_mode->hdisplay,
|
|
drm_mode->hsync_end - drm_mode->hsync_start);
|
|
|
|
drm_dbg_dp(panel->drm_dev, "height=%d vporch= %d %d %d\n",
|
|
drm_mode->vdisplay, drm_mode->vtotal - drm_mode->vsync_end,
|
|
drm_mode->vsync_start - drm_mode->vdisplay,
|
|
drm_mode->vsync_end - drm_mode->vsync_start);
|
|
|
|
total_hor = drm_mode->htotal;
|
|
|
|
total_ver = drm_mode->vtotal;
|
|
|
|
data = total_ver;
|
|
data <<= 16;
|
|
data |= total_hor;
|
|
|
|
catalog->total = data;
|
|
|
|
data = (drm_mode->vtotal - drm_mode->vsync_start);
|
|
data <<= 16;
|
|
data |= (drm_mode->htotal - drm_mode->hsync_start);
|
|
|
|
catalog->sync_start = data;
|
|
|
|
data = drm_mode->vsync_end - drm_mode->vsync_start;
|
|
data <<= 16;
|
|
data |= (panel->dp_panel.dp_mode.v_active_low << 31);
|
|
data |= drm_mode->hsync_end - drm_mode->hsync_start;
|
|
data |= (panel->dp_panel.dp_mode.h_active_low << 15);
|
|
|
|
catalog->width_blanking = data;
|
|
|
|
data = drm_mode->vdisplay;
|
|
data <<= 16;
|
|
data |= drm_mode->hdisplay;
|
|
|
|
catalog->dp_active = data;
|
|
|
|
dp_catalog_panel_timing_cfg(catalog);
|
|
panel->panel_on = true;
|
|
|
|
return 0;
|
|
}
|
|
|
|
int dp_panel_init_panel_info(struct dp_panel *dp_panel)
|
|
{
|
|
struct drm_display_mode *drm_mode;
|
|
struct dp_panel_private *panel;
|
|
|
|
drm_mode = &dp_panel->dp_mode.drm_mode;
|
|
|
|
panel = container_of(dp_panel, struct dp_panel_private, dp_panel);
|
|
|
|
/*
|
|
* print resolution info as this is a result
|
|
* of user initiated action of cable connection
|
|
*/
|
|
drm_dbg_dp(panel->drm_dev, "SET NEW RESOLUTION:\n");
|
|
drm_dbg_dp(panel->drm_dev, "%dx%d@%dfps\n",
|
|
drm_mode->hdisplay, drm_mode->vdisplay, drm_mode_vrefresh(drm_mode));
|
|
drm_dbg_dp(panel->drm_dev,
|
|
"h_porches(back|front|width) = (%d|%d|%d)\n",
|
|
drm_mode->htotal - drm_mode->hsync_end,
|
|
drm_mode->hsync_start - drm_mode->hdisplay,
|
|
drm_mode->hsync_end - drm_mode->hsync_start);
|
|
drm_dbg_dp(panel->drm_dev,
|
|
"v_porches(back|front|width) = (%d|%d|%d)\n",
|
|
drm_mode->vtotal - drm_mode->vsync_end,
|
|
drm_mode->vsync_start - drm_mode->vdisplay,
|
|
drm_mode->vsync_end - drm_mode->vsync_start);
|
|
drm_dbg_dp(panel->drm_dev, "pixel clock (KHz)=(%d)\n",
|
|
drm_mode->clock);
|
|
drm_dbg_dp(panel->drm_dev, "bpp = %d\n", dp_panel->dp_mode.bpp);
|
|
|
|
dp_panel->dp_mode.bpp = max_t(u32, 18,
|
|
min_t(u32, dp_panel->dp_mode.bpp, 30));
|
|
drm_dbg_dp(panel->drm_dev, "updated bpp = %d\n",
|
|
dp_panel->dp_mode.bpp);
|
|
|
|
return 0;
|
|
}
|
|
|
|
struct dp_panel *dp_panel_get(struct dp_panel_in *in)
|
|
{
|
|
struct dp_panel_private *panel;
|
|
struct dp_panel *dp_panel;
|
|
|
|
if (!in->dev || !in->catalog || !in->aux || !in->link) {
|
|
DRM_ERROR("invalid input\n");
|
|
return ERR_PTR(-EINVAL);
|
|
}
|
|
|
|
panel = devm_kzalloc(in->dev, sizeof(*panel), GFP_KERNEL);
|
|
if (!panel)
|
|
return ERR_PTR(-ENOMEM);
|
|
|
|
panel->dev = in->dev;
|
|
panel->aux = in->aux;
|
|
panel->catalog = in->catalog;
|
|
panel->link = in->link;
|
|
|
|
dp_panel = &panel->dp_panel;
|
|
dp_panel->max_bw_code = DP_LINK_BW_8_1;
|
|
panel->aux_cfg_update_done = false;
|
|
|
|
return dp_panel;
|
|
}
|
|
|
|
void dp_panel_put(struct dp_panel *dp_panel)
|
|
{
|
|
if (!dp_panel)
|
|
return;
|
|
|
|
kfree(dp_panel->edid);
|
|
}
|