2e87309e06
The IDVS group size feature was missing. It is used on some Bifrost and Valhall GPUs, and is the last kernel-relevant Bifrost feature we're missing. This feature adds an extra IDVS group size field to the JM_CONFIG register. In kbase, the value is configurable via the device tree; kbase uses 0xF as a default if no value is specified. Until we find a device demanding otherwise, let's always set the 0xF default on devices which support this feature mimicking kbase's behaviour. Tuning this register slightly improves performance of index-driven vertex shading. On Mali-G52 (with Mesa), overall glmark2 score is improved from 1026 to 1037. Geometry-heavy scenes like -bshading are improved from 1068 to 1098. Signed-off-by: Alyssa Rosenzweig <alyssa.rosenzweig@collabora.com> Reviewed-by: Steven Price <steven.price@arm.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220211145849.3148-1-alyssa.rosenzweig@collabora.com
114 lines
3.5 KiB
C
114 lines
3.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/* (C) COPYRIGHT 2014-2018 ARM Limited. All rights reserved. */
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/* Copyright 2019 Linaro, Ltd., Rob Herring <robh@kernel.org> */
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#ifndef __PANFROST_FEATURES_H__
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#define __PANFROST_FEATURES_H__
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#include <linux/bitops.h>
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#include "panfrost_device.h"
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enum panfrost_hw_feature {
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HW_FEATURE_JOBCHAIN_DISAMBIGUATION,
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HW_FEATURE_PWRON_DURING_PWROFF_TRANS,
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HW_FEATURE_XAFFINITY,
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HW_FEATURE_V4,
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HW_FEATURE_FLUSH_REDUCTION,
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HW_FEATURE_PROTECTED_MODE,
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HW_FEATURE_COHERENCY_REG,
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HW_FEATURE_PROTECTED_DEBUG_MODE,
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HW_FEATURE_AARCH64_MMU,
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HW_FEATURE_TLS_HASHING,
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HW_FEATURE_THREAD_GROUP_SPLIT,
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HW_FEATURE_IDVS_GROUP_SIZE,
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HW_FEATURE_3BIT_EXT_RW_L2_MMU_CONFIG,
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};
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#define hw_features_t600 (\
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BIT_ULL(HW_FEATURE_THREAD_GROUP_SPLIT) | \
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BIT_ULL(HW_FEATURE_V4))
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#define hw_features_t620 hw_features_t600
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#define hw_features_t720 hw_features_t600
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#define hw_features_t760 (\
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BIT_ULL(HW_FEATURE_JOBCHAIN_DISAMBIGUATION) | \
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BIT_ULL(HW_FEATURE_PWRON_DURING_PWROFF_TRANS) | \
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BIT_ULL(HW_FEATURE_XAFFINITY) | \
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BIT_ULL(HW_FEATURE_THREAD_GROUP_SPLIT))
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#define hw_features_t860 hw_features_t760
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#define hw_features_t880 hw_features_t760
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#define hw_features_t830 hw_features_t760
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#define hw_features_t820 hw_features_t760
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#define hw_features_g71 (\
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BIT_ULL(HW_FEATURE_JOBCHAIN_DISAMBIGUATION) | \
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BIT_ULL(HW_FEATURE_PWRON_DURING_PWROFF_TRANS) | \
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BIT_ULL(HW_FEATURE_XAFFINITY) | \
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BIT_ULL(HW_FEATURE_THREAD_GROUP_SPLIT) | \
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BIT_ULL(HW_FEATURE_FLUSH_REDUCTION) | \
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BIT_ULL(HW_FEATURE_PROTECTED_MODE) | \
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BIT_ULL(HW_FEATURE_COHERENCY_REG))
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#define hw_features_g72 (\
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BIT_ULL(HW_FEATURE_JOBCHAIN_DISAMBIGUATION) | \
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BIT_ULL(HW_FEATURE_PWRON_DURING_PWROFF_TRANS) | \
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BIT_ULL(HW_FEATURE_XAFFINITY) | \
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BIT_ULL(HW_FEATURE_THREAD_GROUP_SPLIT) | \
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BIT_ULL(HW_FEATURE_FLUSH_REDUCTION) | \
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BIT_ULL(HW_FEATURE_PROTECTED_MODE) | \
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BIT_ULL(HW_FEATURE_PROTECTED_DEBUG_MODE) | \
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BIT_ULL(HW_FEATURE_COHERENCY_REG))
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#define hw_features_g51 hw_features_g72
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#define hw_features_g52 (\
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BIT_ULL(HW_FEATURE_JOBCHAIN_DISAMBIGUATION) | \
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BIT_ULL(HW_FEATURE_PWRON_DURING_PWROFF_TRANS) | \
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BIT_ULL(HW_FEATURE_XAFFINITY) | \
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BIT_ULL(HW_FEATURE_THREAD_GROUP_SPLIT) | \
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BIT_ULL(HW_FEATURE_FLUSH_REDUCTION) | \
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BIT_ULL(HW_FEATURE_PROTECTED_MODE) | \
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BIT_ULL(HW_FEATURE_PROTECTED_DEBUG_MODE) | \
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BIT_ULL(HW_FEATURE_IDVS_GROUP_SIZE) | \
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BIT_ULL(HW_FEATURE_COHERENCY_REG))
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#define hw_features_g76 (\
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BIT_ULL(HW_FEATURE_JOBCHAIN_DISAMBIGUATION) | \
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BIT_ULL(HW_FEATURE_PWRON_DURING_PWROFF_TRANS) | \
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BIT_ULL(HW_FEATURE_XAFFINITY) | \
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BIT_ULL(HW_FEATURE_THREAD_GROUP_SPLIT) | \
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BIT_ULL(HW_FEATURE_FLUSH_REDUCTION) | \
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BIT_ULL(HW_FEATURE_PROTECTED_MODE) | \
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BIT_ULL(HW_FEATURE_PROTECTED_DEBUG_MODE) | \
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BIT_ULL(HW_FEATURE_COHERENCY_REG) | \
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BIT_ULL(HW_FEATURE_AARCH64_MMU) | \
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BIT_ULL(HW_FEATURE_TLS_HASHING) | \
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BIT_ULL(HW_FEATURE_IDVS_GROUP_SIZE) | \
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BIT_ULL(HW_FEATURE_3BIT_EXT_RW_L2_MMU_CONFIG))
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#define hw_features_g31 (\
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BIT_ULL(HW_FEATURE_JOBCHAIN_DISAMBIGUATION) | \
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BIT_ULL(HW_FEATURE_PWRON_DURING_PWROFF_TRANS) | \
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BIT_ULL(HW_FEATURE_XAFFINITY) | \
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BIT_ULL(HW_FEATURE_THREAD_GROUP_SPLIT) | \
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BIT_ULL(HW_FEATURE_FLUSH_REDUCTION) | \
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BIT_ULL(HW_FEATURE_PROTECTED_MODE) | \
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BIT_ULL(HW_FEATURE_PROTECTED_DEBUG_MODE) | \
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BIT_ULL(HW_FEATURE_COHERENCY_REG) | \
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BIT_ULL(HW_FEATURE_AARCH64_MMU) | \
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BIT_ULL(HW_FEATURE_TLS_HASHING) | \
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BIT_ULL(HW_FEATURE_3BIT_EXT_RW_L2_MMU_CONFIG))
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static inline bool panfrost_has_hw_feature(struct panfrost_device *pfdev,
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enum panfrost_hw_feature feat)
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{
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return test_bit(feat, pfdev->features.hw_features);
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}
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#endif
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