On Intel platforms, not all safety features are enabled on the hardware. The current implementation enable all safety features by default. This will cause mass error and warning printouts after the module is loaded. Introduce platform specific safety features flag to enable or disable each safety features. Signed-off-by: Wong Vee Khee <vee.khee.wong@linux.intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
315 lines
7.7 KiB
C
315 lines
7.7 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*******************************************************************************
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This contains the functions to handle the pci driver.
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Copyright (C) 2011-2012 Vayavya Labs Pvt Ltd
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Author: Rayagond Kokatanur <rayagond@vayavyalabs.com>
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Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
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*******************************************************************************/
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#include <linux/clk-provider.h>
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#include <linux/pci.h>
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#include <linux/dmi.h>
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#include "stmmac.h"
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struct stmmac_pci_info {
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int (*setup)(struct pci_dev *pdev, struct plat_stmmacenet_data *plat);
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};
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static void common_default_data(struct plat_stmmacenet_data *plat)
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{
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plat->clk_csr = 2; /* clk_csr_i = 20-35MHz & MDC = clk_csr_i/16 */
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plat->has_gmac = 1;
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plat->force_sf_dma_mode = 1;
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plat->mdio_bus_data->needs_reset = true;
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/* Set default value for multicast hash bins */
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plat->multicast_filter_bins = HASH_TABLE_SIZE;
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/* Set default value for unicast filter entries */
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plat->unicast_filter_entries = 1;
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/* Set the maxmtu to a default of JUMBO_LEN */
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plat->maxmtu = JUMBO_LEN;
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/* Set default number of RX and TX queues to use */
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plat->tx_queues_to_use = 1;
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plat->rx_queues_to_use = 1;
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/* Disable Priority config by default */
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plat->tx_queues_cfg[0].use_prio = false;
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plat->rx_queues_cfg[0].use_prio = false;
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/* Disable RX queues routing by default */
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plat->rx_queues_cfg[0].pkt_route = 0x0;
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}
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static int stmmac_default_data(struct pci_dev *pdev,
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struct plat_stmmacenet_data *plat)
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{
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/* Set common default data first */
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common_default_data(plat);
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plat->bus_id = 1;
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plat->phy_addr = 0;
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plat->phy_interface = PHY_INTERFACE_MODE_GMII;
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plat->dma_cfg->pbl = 32;
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plat->dma_cfg->pblx8 = true;
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/* TODO: AXI */
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return 0;
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}
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static const struct stmmac_pci_info stmmac_pci_info = {
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.setup = stmmac_default_data,
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};
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static int snps_gmac5_default_data(struct pci_dev *pdev,
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struct plat_stmmacenet_data *plat)
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{
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int i;
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plat->clk_csr = 5;
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plat->has_gmac4 = 1;
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plat->force_sf_dma_mode = 1;
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plat->tso_en = 1;
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plat->pmt = 1;
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/* Set default value for multicast hash bins */
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plat->multicast_filter_bins = HASH_TABLE_SIZE;
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/* Set default value for unicast filter entries */
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plat->unicast_filter_entries = 1;
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/* Set the maxmtu to a default of JUMBO_LEN */
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plat->maxmtu = JUMBO_LEN;
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/* Set default number of RX and TX queues to use */
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plat->tx_queues_to_use = 4;
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plat->rx_queues_to_use = 4;
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plat->tx_sched_algorithm = MTL_TX_ALGORITHM_WRR;
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for (i = 0; i < plat->tx_queues_to_use; i++) {
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plat->tx_queues_cfg[i].use_prio = false;
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plat->tx_queues_cfg[i].mode_to_use = MTL_QUEUE_DCB;
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plat->tx_queues_cfg[i].weight = 25;
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if (i > 0)
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plat->tx_queues_cfg[i].tbs_en = 1;
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}
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plat->rx_sched_algorithm = MTL_RX_ALGORITHM_SP;
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for (i = 0; i < plat->rx_queues_to_use; i++) {
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plat->rx_queues_cfg[i].use_prio = false;
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plat->rx_queues_cfg[i].mode_to_use = MTL_QUEUE_DCB;
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plat->rx_queues_cfg[i].pkt_route = 0x0;
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plat->rx_queues_cfg[i].chan = i;
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}
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plat->bus_id = 1;
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plat->phy_addr = -1;
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plat->phy_interface = PHY_INTERFACE_MODE_GMII;
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plat->dma_cfg->pbl = 32;
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plat->dma_cfg->pblx8 = true;
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/* Axi Configuration */
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plat->axi = devm_kzalloc(&pdev->dev, sizeof(*plat->axi), GFP_KERNEL);
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if (!plat->axi)
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return -ENOMEM;
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plat->axi->axi_wr_osr_lmt = 31;
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plat->axi->axi_rd_osr_lmt = 31;
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plat->axi->axi_fb = false;
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plat->axi->axi_blen[0] = 4;
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plat->axi->axi_blen[1] = 8;
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plat->axi->axi_blen[2] = 16;
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plat->axi->axi_blen[3] = 32;
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return 0;
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}
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static const struct stmmac_pci_info snps_gmac5_pci_info = {
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.setup = snps_gmac5_default_data,
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};
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/**
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* stmmac_pci_probe
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*
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* @pdev: pci device pointer
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* @id: pointer to table of device id/id's.
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*
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* Description: This probing function gets called for all PCI devices which
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* match the ID table and are not "owned" by other driver yet. This function
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* gets passed a "struct pci_dev *" for each device whose entry in the ID table
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* matches the device. The probe functions returns zero when the driver choose
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* to take "ownership" of the device or an error code(-ve no) otherwise.
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*/
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static int stmmac_pci_probe(struct pci_dev *pdev,
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const struct pci_device_id *id)
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{
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struct stmmac_pci_info *info = (struct stmmac_pci_info *)id->driver_data;
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struct plat_stmmacenet_data *plat;
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struct stmmac_resources res;
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int i;
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int ret;
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plat = devm_kzalloc(&pdev->dev, sizeof(*plat), GFP_KERNEL);
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if (!plat)
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return -ENOMEM;
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plat->mdio_bus_data = devm_kzalloc(&pdev->dev,
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sizeof(*plat->mdio_bus_data),
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GFP_KERNEL);
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if (!plat->mdio_bus_data)
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return -ENOMEM;
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plat->dma_cfg = devm_kzalloc(&pdev->dev, sizeof(*plat->dma_cfg),
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GFP_KERNEL);
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if (!plat->dma_cfg)
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return -ENOMEM;
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plat->safety_feat_cfg = devm_kzalloc(&pdev->dev,
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sizeof(*plat->safety_feat_cfg),
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GFP_KERNEL);
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if (!plat->safety_feat_cfg)
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return -ENOMEM;
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/* Enable pci device */
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ret = pci_enable_device(pdev);
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if (ret) {
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dev_err(&pdev->dev, "%s: ERROR: failed to enable device\n",
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__func__);
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return ret;
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}
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/* Get the base address of device */
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for (i = 0; i < PCI_STD_NUM_BARS; i++) {
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if (pci_resource_len(pdev, i) == 0)
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continue;
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ret = pcim_iomap_regions(pdev, BIT(i), pci_name(pdev));
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if (ret)
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return ret;
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break;
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}
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pci_set_master(pdev);
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ret = info->setup(pdev, plat);
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if (ret)
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return ret;
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memset(&res, 0, sizeof(res));
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res.addr = pcim_iomap_table(pdev)[i];
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res.wol_irq = pdev->irq;
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res.irq = pdev->irq;
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plat->safety_feat_cfg->tsoee = 1;
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plat->safety_feat_cfg->mrxpee = 1;
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plat->safety_feat_cfg->mestee = 1;
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plat->safety_feat_cfg->mrxee = 1;
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plat->safety_feat_cfg->mtxee = 1;
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plat->safety_feat_cfg->epsi = 1;
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plat->safety_feat_cfg->edpp = 1;
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plat->safety_feat_cfg->prtyen = 1;
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plat->safety_feat_cfg->tmouten = 1;
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return stmmac_dvr_probe(&pdev->dev, plat, &res);
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}
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/**
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* stmmac_pci_remove
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*
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* @pdev: platform device pointer
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* Description: this function calls the main to free the net resources
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* and releases the PCI resources.
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*/
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static void stmmac_pci_remove(struct pci_dev *pdev)
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{
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int i;
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stmmac_dvr_remove(&pdev->dev);
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for (i = 0; i < PCI_STD_NUM_BARS; i++) {
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if (pci_resource_len(pdev, i) == 0)
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continue;
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pcim_iounmap_regions(pdev, BIT(i));
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break;
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}
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pci_disable_device(pdev);
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}
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static int __maybe_unused stmmac_pci_suspend(struct device *dev)
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{
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struct pci_dev *pdev = to_pci_dev(dev);
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int ret;
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ret = stmmac_suspend(dev);
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if (ret)
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return ret;
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ret = pci_save_state(pdev);
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if (ret)
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return ret;
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pci_disable_device(pdev);
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pci_wake_from_d3(pdev, true);
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return 0;
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}
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static int __maybe_unused stmmac_pci_resume(struct device *dev)
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{
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struct pci_dev *pdev = to_pci_dev(dev);
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int ret;
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pci_restore_state(pdev);
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pci_set_power_state(pdev, PCI_D0);
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ret = pci_enable_device(pdev);
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if (ret)
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return ret;
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pci_set_master(pdev);
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return stmmac_resume(dev);
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}
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static SIMPLE_DEV_PM_OPS(stmmac_pm_ops, stmmac_pci_suspend, stmmac_pci_resume);
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/* synthetic ID, no official vendor */
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#define PCI_VENDOR_ID_STMMAC 0x0700
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#define PCI_DEVICE_ID_STMMAC_STMMAC 0x1108
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#define PCI_DEVICE_ID_SYNOPSYS_GMAC5_ID 0x7102
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static const struct pci_device_id stmmac_id_table[] = {
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{ PCI_DEVICE_DATA(STMMAC, STMMAC, &stmmac_pci_info) },
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{ PCI_DEVICE_DATA(STMICRO, MAC, &stmmac_pci_info) },
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{ PCI_DEVICE_DATA(SYNOPSYS, GMAC5_ID, &snps_gmac5_pci_info) },
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{}
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};
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MODULE_DEVICE_TABLE(pci, stmmac_id_table);
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static struct pci_driver stmmac_pci_driver = {
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.name = STMMAC_RESOURCE_NAME,
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.id_table = stmmac_id_table,
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.probe = stmmac_pci_probe,
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.remove = stmmac_pci_remove,
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.driver = {
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.pm = &stmmac_pm_ops,
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},
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};
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module_pci_driver(stmmac_pci_driver);
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MODULE_DESCRIPTION("STMMAC 10/100/1000 Ethernet PCI driver");
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MODULE_AUTHOR("Rayagond Kokatanur <rayagond.kokatanur@vayavyalabs.com>");
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MODULE_AUTHOR("Giuseppe Cavallaro <peppe.cavallaro@st.com>");
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MODULE_LICENSE("GPL");
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