0603839b18
Add the exception and interrupt handling machanism for basic LoongArch support. Reviewed-by: WANG Xuerui <git@xen0n.name> Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
77 lines
1.8 KiB
C
77 lines
1.8 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2020-2022 Loongson Technology Corporation Limited
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*/
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#include <linux/kernel.h>
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#include <linux/acpi.h>
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#include <linux/atomic.h>
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#include <linux/delay.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/irqchip.h>
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#include <linux/kernel_stat.h>
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#include <linux/proc_fs.h>
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#include <linux/mm.h>
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#include <linux/sched.h>
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#include <linux/seq_file.h>
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#include <linux/kallsyms.h>
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#include <linux/uaccess.h>
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#include <asm/irq.h>
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#include <asm/loongson.h>
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#include <asm/setup.h>
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DEFINE_PER_CPU(unsigned long, irq_stack);
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struct irq_domain *cpu_domain;
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struct irq_domain *liointc_domain;
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struct irq_domain *pch_lpc_domain;
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struct irq_domain *pch_msi_domain[MAX_IO_PICS];
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struct irq_domain *pch_pic_domain[MAX_IO_PICS];
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/*
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* 'what should we do if we get a hw irq event on an illegal vector'.
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* each architecture has to answer this themselves.
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*/
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void ack_bad_irq(unsigned int irq)
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{
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pr_warn("Unexpected IRQ # %d\n", irq);
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}
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atomic_t irq_err_count;
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asmlinkage void spurious_interrupt(void)
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{
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atomic_inc(&irq_err_count);
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}
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int arch_show_interrupts(struct seq_file *p, int prec)
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{
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seq_printf(p, "%*s: %10u\n", prec, "ERR", atomic_read(&irq_err_count));
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return 0;
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}
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void __init init_IRQ(void)
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{
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int i;
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unsigned int order = get_order(IRQ_STACK_SIZE);
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struct page *page;
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clear_csr_ecfg(ECFG0_IM);
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clear_csr_estat(ESTATF_IP);
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irqchip_init();
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for (i = 0; i < NR_IRQS; i++)
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irq_set_noprobe(i);
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for_each_possible_cpu(i) {
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page = alloc_pages_node(cpu_to_node(i), GFP_KERNEL, order);
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per_cpu(irq_stack, i) = (unsigned long)page_address(page);
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pr_debug("CPU%d IRQ stack at 0x%lx - 0x%lx\n", i,
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per_cpu(irq_stack, i), per_cpu(irq_stack, i) + IRQ_STACK_SIZE);
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}
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set_csr_ecfg(ECFGF_IP0 | ECFGF_IP1 | ECFGF_IP2 | ECFGF_IPI | ECFGF_PMC);
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}
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