3a9f66cb25
The RISC-V hypervisor specification doesn't have any virtual timer feature. Due to this, the guest VCPU timer will be programmed via SBI calls. The host will use a separate hrtimer event for each guest VCPU to provide timer functionality. We inject a virtual timer interrupt to the guest VCPU whenever the guest VCPU hrtimer event expires. This patch adds guest VCPU timer implementation along with ONE_REG interface to access VCPU timer state from user space. Signed-off-by: Atish Patra <atish.patra@wdc.com> Signed-off-by: Anup Patel <anup.patel@wdc.com> Acked-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Palmer Dabbelt <palmerdabbelt@google.com>
44 lines
1.2 KiB
C
44 lines
1.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2019 Western Digital Corporation or its affiliates.
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*
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* Authors:
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* Atish Patra <atish.patra@wdc.com>
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*/
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#ifndef __KVM_VCPU_RISCV_TIMER_H
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#define __KVM_VCPU_RISCV_TIMER_H
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#include <linux/hrtimer.h>
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struct kvm_guest_timer {
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/* Mult & Shift values to get nanoseconds from cycles */
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u32 nsec_mult;
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u32 nsec_shift;
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/* Time delta value */
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u64 time_delta;
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};
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struct kvm_vcpu_timer {
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/* Flag for whether init is done */
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bool init_done;
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/* Flag for whether timer event is configured */
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bool next_set;
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/* Next timer event cycles */
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u64 next_cycles;
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/* Underlying hrtimer instance */
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struct hrtimer hrt;
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};
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int kvm_riscv_vcpu_timer_next_event(struct kvm_vcpu *vcpu, u64 ncycles);
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int kvm_riscv_vcpu_get_reg_timer(struct kvm_vcpu *vcpu,
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const struct kvm_one_reg *reg);
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int kvm_riscv_vcpu_set_reg_timer(struct kvm_vcpu *vcpu,
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const struct kvm_one_reg *reg);
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int kvm_riscv_vcpu_timer_init(struct kvm_vcpu *vcpu);
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int kvm_riscv_vcpu_timer_deinit(struct kvm_vcpu *vcpu);
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int kvm_riscv_vcpu_timer_reset(struct kvm_vcpu *vcpu);
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void kvm_riscv_vcpu_timer_restore(struct kvm_vcpu *vcpu);
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int kvm_riscv_guest_timer_init(struct kvm *kvm);
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#endif
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