1
0
Fork 0
mirror of synced 2025-03-06 20:59:54 +01:00
linux/drivers/gpu/drm/amd/display/dc/inc
Joshua Aberback dbf5256bbf drm/amd/display: Blank HUBP during pixel data blank for DCN30 v2
[Why]
Prior commit "Blank HUBP during pixel data blank for DCN30"
missed the call to set_disp_pattern_generator from
set_crtc_test_pattern, which re-exposed the issue for which
we initially blocked active-only p-state switching.

[How]
 - remove dcn30_blank_pixel_data, set dcn30 back to dcn20 version
 - new hwss funciton set_disp_pattern_generator
 - dcn20 version just calls opp_set_disp_pattern_generator
 - dcn30 version implements the HUBP blank

Signed-off-by: Joshua Aberback <joshua.aberback@amd.com>
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2020-11-02 15:31:30 -05:00
..
hw drm/amd/display: Define PSR ERROR Status bit VSC_SDP 2020-10-26 13:29:27 -04:00
bw_fixed.h drm/amd/display: explicit uint64_t casting 2018-11-05 14:20:50 -05:00
clock_source.h drm/amd/display: Keep clocks high before seamless boot done 2019-03-19 15:04:03 -05:00
compressor.h drm/amd/display: fbc state could not reach while enable fbc 2018-11-30 12:02:35 -05:00
core_status.h drm/amd/display: fail instead of div by zero/bugcheck 2020-11-02 15:30:47 -05:00
core_types.h drm/amd/display: Calc DLG from dummy p-state if full p-state unsupported 2020-09-29 16:08:50 -04:00
custom_float.h drm/amd/display: Enable regamma 25 segments and use double buffer. 2017-09-26 17:14:18 -04:00
dc_link_ddc.h drm/amd/display: DP link layer test 4.2.1.1 fix due to specs update 2020-07-01 01:59:26 -04:00
dc_link_dp.h drm/amd/display: DP link layer test 4.2.1.1 fix due to specs update 2020-07-01 01:59:26 -04:00
dce_calcs.h drm/amdgpu/display: remove VEGAM config option 2018-05-18 16:08:18 -05:00
dcn_calc_math.h drm/amd/display: fixup DML dependencies 2020-01-16 14:16:48 -05:00
dcn_calcs.h drm/amd/display: make clk mgr soc specific 2019-05-31 10:39:29 -05:00
hw_sequencer.h drm/amd/display: Blank HUBP during pixel data blank for DCN30 v2 2020-11-02 15:31:30 -05:00
hw_sequencer_private.h drm/amd/display: move panel power seq to new panel struct 2020-04-22 18:11:48 -04:00
link_hwss.h drm/amd/display: correct eDP T9 delay 2020-11-02 15:31:10 -05:00
reg_helper.h drm/amd/display: Indirect reg read macro with shift and mask 2020-01-16 14:13:53 -05:00
resource.h drm/amd/display: Add DCN3 Resource 2020-07-01 01:59:15 -04:00
vm_helper.h drm/amd/display: move vmid determination logic to a module 2019-06-22 09:34:14 -05:00