b6d1a06320
Add VCN_5_0_0 IP init, ring functions, DPG support.
v2: squash in warning fixes (Alex)
v3: squash in block and ring init, boot, doorbell enablement,
DPG support (Alex)
Signed-off-by: Sonny Jiang <sonny.jiang@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
37 lines
1.6 KiB
C
37 lines
1.6 KiB
C
/*
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* Copyright 2023 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#ifndef __VCN_V5_0_0_H__
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#define __VCN_V5_0_0_H__
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#define VCN_VID_SOC_ADDRESS 0x1FC00
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#define VCN_AON_SOC_ADDRESS 0x1F800
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#define VCN1_VID_SOC_ADDRESS 0x48300
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#define VCN1_AON_SOC_ADDRESS 0x48000
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#define VCN_VID_IP_ADDRESS 0x0
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#define VCN_AON_IP_ADDRESS 0x30000
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extern const struct amdgpu_ip_block_version vcn_v5_0_0_ip_block;
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#endif /* __VCN_V5_0_0_H__ */
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