c9358de193
The hfi1 user SDMA pinned-page cache will leave a stale cache entry when the cache-entry's virtual address range is invalidated but that cache entry is in-use by an outstanding SDMA request. Subsequent user SDMA requests with buffers in or spanning the virtual address range of the stale cache entry will result in packets constructed from the wrong memory, the physical pages pointed to by the stale cache entry. To fix this, remove mmu_rb_node cache entries from the mmu_rb_handler cache independent of the cache entry's refcount. Add 'struct kref refcount' to struct mmu_rb_node and manage mmu_rb_node lifetime with kref_get() and kref_put(). mmu_rb_node.refcount makes sdma_mmu_node.refcount redundant. Remove 'atomic_t refcount' from struct sdma_mmu_node and change sdma_mmu_node code to use mmu_rb_node.refcount. Move the mmu_rb_handler destructor call after a wait-for-SDMA-request-completion call so mmu_rb_nodes that need mmu_rb_handler's workqueue to queue themselves up for destruction from an interrupt context may do so. Fixes:f48ad614c1("IB/hfi1: Move driver out of staging") Fixes:00cbce5cbf("IB/hfi1: Fix bugs with non-PAGE_SIZE-end multi-iovec user SDMA requests") Link: https://lore.kernel.org/r/168451393605.3700681.13493776139032178861.stgit@awfm-02.cornelisnetworks.com Reviewed-by: Dean Luick <dean.luick@cornelisnetworks.com> Signed-off-by: Brendan Cunningham <bcunningham@cornelisnetworks.com> Signed-off-by: Dennis Dalessandro <dennis.dalessandro@cornelisnetworks.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
97 lines
2.5 KiB
C
97 lines
2.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0 or BSD-3-Clause */
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/*
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* Copyright(c) 2016 Intel Corporation.
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*/
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#ifndef HFI1_SDMA_TXREQ_H
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#define HFI1_SDMA_TXREQ_H
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/* increased for AHG */
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#define NUM_DESC 6
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/*
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* struct sdma_desc - canonical fragment descriptor
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*
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* This is the descriptor carried in the tx request
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* corresponding to each fragment.
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*
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*/
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struct sdma_desc {
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/* private: don't use directly */
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u64 qw[2];
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void *pinning_ctx;
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/* Release reference to @pinning_ctx. May be called in interrupt context. Must not sleep. */
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void (*ctx_put)(void *ctx);
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};
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/**
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* struct sdma_txreq - the sdma_txreq structure (one per packet)
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* @list: for use by user and by queuing for wait
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*
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* This is the representation of a packet which consists of some
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* number of fragments. Storage is provided to within the structure.
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* for all fragments.
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*
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* The storage for the descriptors are automatically extended as needed
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* when the currently allocation is exceeded.
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*
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* The user (Verbs or PSM) may overload this structure with fields
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* specific to their use by putting this struct first in their struct.
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* The method of allocation of the overloaded structure is user dependent
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*
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* The list is the only public field in the structure.
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*
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*/
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#define SDMA_TXREQ_S_OK 0
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#define SDMA_TXREQ_S_SENDERROR 1
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#define SDMA_TXREQ_S_ABORTED 2
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#define SDMA_TXREQ_S_SHUTDOWN 3
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/* flags bits */
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#define SDMA_TXREQ_F_URGENT 0x0001
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#define SDMA_TXREQ_F_AHG_COPY 0x0002
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#define SDMA_TXREQ_F_USE_AHG 0x0004
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#define SDMA_TXREQ_F_VIP 0x0010
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struct sdma_txreq;
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typedef void (*callback_t)(struct sdma_txreq *, int);
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struct iowait;
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struct sdma_txreq {
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struct list_head list;
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/* private: */
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struct sdma_desc *descp;
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/* private: */
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void *coalesce_buf;
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/* private: */
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struct iowait *wait;
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/* private: */
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callback_t complete;
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#ifdef CONFIG_HFI1_DEBUG_SDMA_ORDER
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u64 sn;
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#endif
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/* private: - used in coalesce/pad processing */
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u16 packet_len;
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/* private: - down-counted to trigger last */
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u16 tlen;
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/* private: */
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u16 num_desc;
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/* private: */
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u16 desc_limit;
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/* private: */
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u16 next_descq_idx;
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/* private: */
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u16 coalesce_idx;
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/* private: flags */
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u16 flags;
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/* private: */
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struct sdma_desc descs[NUM_DESC];
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};
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static inline int sdma_txreq_built(struct sdma_txreq *tx)
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{
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return tx->num_desc;
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}
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#endif /* HFI1_SDMA_TXREQ_H */
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