49ca6462fc
The mmiowb() macro is horribly difficult to use and drivers will continue to work most of the time if they omit a call when it is required. Rather than rely on driver authors getting this right, push mmiowb() into arch_spin_unlock() for ia64. If this is deemed to be a performance issue, a subsequent optimisation could make use of ARCH_HAS_MMIOWB to elide the barrier in cases where no I/O writes were performed inside the critical section. Acked-by: Linus Torvalds <torvalds@linux-foundation.org> Signed-off-by: Will Deacon <will.deacon@arm.com>
25 lines
569 B
C
25 lines
569 B
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_IA64_MMIOWB_H
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#define _ASM_IA64_MMIOWB_H
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#include <asm/machvec.h>
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/**
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* ___ia64_mmiowb - I/O write barrier
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*
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* Ensure ordering of I/O space writes. This will make sure that writes
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* following the barrier will arrive after all previous writes. For most
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* ia64 platforms, this is a simple 'mf.a' instruction.
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*/
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static inline void ___ia64_mmiowb(void)
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{
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ia64_mfa();
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}
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#define __ia64_mmiowb ___ia64_mmiowb
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#define mmiowb() platform_mmiowb()
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#include <asm-generic/mmiowb.h>
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#endif /* _ASM_IA64_MMIOWB_H */
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