2a55550fbb
Similar to the recent arm64 fix[1], avoid overly wide casts in the m68k
cmpxchg implementation. Avoids this warning under -Warray-bounds with
GCC 11:
net/sched/cls_tcindex.c: In function 'tcindex_set_parms':
./arch/m68k/include/asm/cmpxchg.h:64:17: warning: array subscript 'volatile struct __xchg_dummy[0]' is partly outside array bounds of 'struct tcf_result[1]' [-Warray-bounds]
64 | __asm__ __volatile__
| ^~~~~~~
net/sched/cls_tcindex.c:338:27: note: while referencing 'cr'
338 | struct tcf_result cr = {};
| ^~
No binary output difference are seen from this change.
[1] commit 3364c6ce23 ("arm64: atomics: lse: Dereference matching size")
Cc: "Peter Zijlstra (Intel)" <peterz@infradead.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Greg Ungerer <gerg@linux-m68k.org>
Cc: linux-m68k@lists.linux-m68k.org
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
Link: https://lore.kernel.org/lkml/CAMuHMdVRrD+2zKoHxAaQdDuiK5JFDanbv0SJ91OdWfx+eyekPQ@mail.gmail.com
Signed-off-by: Kees Cook <keescook@chromium.org>
135 lines
3.1 KiB
C
135 lines
3.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef __ARCH_M68K_CMPXCHG__
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#define __ARCH_M68K_CMPXCHG__
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#include <linux/irqflags.h>
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#define __xg(type, x) ((volatile type *)(x))
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extern unsigned long __invalid_xchg_size(unsigned long, volatile void *, int);
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#ifndef CONFIG_RMW_INSNS
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static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int size)
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{
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unsigned long flags, tmp;
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local_irq_save(flags);
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switch (size) {
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case 1:
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tmp = *(u8 *)ptr;
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*(u8 *)ptr = x;
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x = tmp;
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break;
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case 2:
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tmp = *(u16 *)ptr;
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*(u16 *)ptr = x;
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x = tmp;
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break;
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case 4:
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tmp = *(u32 *)ptr;
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*(u32 *)ptr = x;
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x = tmp;
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break;
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default:
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tmp = __invalid_xchg_size(x, ptr, size);
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break;
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}
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local_irq_restore(flags);
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return x;
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}
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#else
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static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int size)
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{
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switch (size) {
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case 1:
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__asm__ __volatile__
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("moveb %2,%0\n\t"
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"1:\n\t"
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"casb %0,%1,%2\n\t"
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"jne 1b"
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: "=&d" (x) : "d" (x), "m" (*__xg(u8, ptr)) : "memory");
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break;
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case 2:
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__asm__ __volatile__
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("movew %2,%0\n\t"
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"1:\n\t"
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"casw %0,%1,%2\n\t"
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"jne 1b"
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: "=&d" (x) : "d" (x), "m" (*__xg(u16, ptr)) : "memory");
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break;
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case 4:
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__asm__ __volatile__
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("movel %2,%0\n\t"
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"1:\n\t"
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"casl %0,%1,%2\n\t"
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"jne 1b"
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: "=&d" (x) : "d" (x), "m" (*__xg(u32, ptr)) : "memory");
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break;
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default:
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x = __invalid_xchg_size(x, ptr, size);
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break;
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}
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return x;
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}
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#endif
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#define arch_xchg(ptr,x) ({(__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr)));})
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#include <asm-generic/cmpxchg-local.h>
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#define arch_cmpxchg64_local(ptr, o, n) __generic_cmpxchg64_local((ptr), (o), (n))
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extern unsigned long __invalid_cmpxchg_size(volatile void *,
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unsigned long, unsigned long, int);
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/*
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* Atomic compare and exchange. Compare OLD with MEM, if identical,
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* store NEW in MEM. Return the initial value in MEM. Success is
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* indicated by comparing RETURN with OLD.
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*/
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#ifdef CONFIG_RMW_INSNS
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static inline unsigned long __cmpxchg(volatile void *p, unsigned long old,
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unsigned long new, int size)
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{
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switch (size) {
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case 1:
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__asm__ __volatile__ ("casb %0,%2,%1"
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: "=d" (old), "=m" (*(char *)p)
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: "d" (new), "0" (old), "m" (*(char *)p));
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break;
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case 2:
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__asm__ __volatile__ ("casw %0,%2,%1"
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: "=d" (old), "=m" (*(short *)p)
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: "d" (new), "0" (old), "m" (*(short *)p));
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break;
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case 4:
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__asm__ __volatile__ ("casl %0,%2,%1"
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: "=d" (old), "=m" (*(int *)p)
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: "d" (new), "0" (old), "m" (*(int *)p));
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break;
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default:
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old = __invalid_cmpxchg_size(p, old, new, size);
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break;
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}
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return old;
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}
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#define arch_cmpxchg(ptr, o, n) \
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({(__typeof__(*(ptr)))__cmpxchg((ptr), (unsigned long)(o), \
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(unsigned long)(n), sizeof(*(ptr)));})
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#define arch_cmpxchg_local(ptr, o, n) \
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({(__typeof__(*(ptr)))__cmpxchg((ptr), (unsigned long)(o), \
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(unsigned long)(n), sizeof(*(ptr)));})
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#define arch_cmpxchg64(ptr, o, n) arch_cmpxchg64_local((ptr), (o), (n))
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#else
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#include <asm-generic/cmpxchg.h>
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#endif
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#endif /* __ARCH_M68K_CMPXCHG__ */
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