a5edf9815d
KFENCE support was added for ppc32 in commit 90cbac0e99
("powerpc: Enable KFENCE for PPC32").
Enable KFENCE on ppc64 architecture with hash and radix MMUs.
It uses the same mechanism as debug pagealloc to
protect/unprotect pages. All KFENCE kunit tests pass on both
MMUs.
KFENCE memory is initially allocated using memblock but is
later marked as SLAB allocated. This necessitates the change
to __pud_free to ensure that the KFENCE pages are freed
appropriately.
Based on previous work by Christophe Leroy and Jordan Niethe.
Signed-off-by: Nicholas Miehlbradt <nicholas@linux.ibm.com>
Reviewed-by: Russell Currey <ruscur@russell.cc>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20220926075726.2846-4-nicholas@linux.ibm.com
48 lines
925 B
C
48 lines
925 B
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* powerpc KFENCE support.
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*
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* Copyright (C) 2020 CS GROUP France
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*/
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#ifndef __ASM_POWERPC_KFENCE_H
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#define __ASM_POWERPC_KFENCE_H
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#include <linux/mm.h>
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#include <asm/pgtable.h>
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#ifdef CONFIG_PPC64_ELF_ABI_V1
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#define ARCH_FUNC_PREFIX "."
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#endif
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static inline bool arch_kfence_init_pool(void)
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{
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return true;
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}
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#ifdef CONFIG_PPC64
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static inline bool kfence_protect_page(unsigned long addr, bool protect)
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{
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struct page *page = virt_to_page(addr);
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__kernel_map_pages(page, 1, !protect);
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return true;
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}
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#else
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static inline bool kfence_protect_page(unsigned long addr, bool protect)
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{
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pte_t *kpte = virt_to_kpte(addr);
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if (protect) {
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pte_update(&init_mm, addr, kpte, _PAGE_PRESENT, 0, 0);
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flush_tlb_kernel_range(addr, addr + PAGE_SIZE);
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} else {
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pte_update(&init_mm, addr, kpte, 0, _PAGE_PRESENT, 0);
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}
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return true;
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}
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#endif
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#endif /* __ASM_POWERPC_KFENCE_H */
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